NB6N11S中文资料Clock / Data Fanout Buffer, 1:2 AnyLevel™ Input, LVDS, 3.3 V数据手册ONSEMI规格书

描述 Description

The NB6N11S is a differential 1:2 Clock or Data Receiver and will accept AnyLevelTM input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS. These signals will be translated to LVDS and two identical copies of Clock or Data will be distributed, operating up to 2.0 GHz or 2.5 Gb/s, respectively. As such, the NB6N11S is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications. The NB6N11S has a wide input common mode range from GND + 50mV to VCC - 50 mV. Combined with the 50-ohm internal termination resistors at the inputs, the NB6N11S is ideal for translating a variety of differential or single-ended Clock or Data signals to 350 mV typical LVDS output levels. The NB6N11S is functionally equivalent to the EP11, LVEP11, SG11 or 7L11M devices and is offered in a small 3mm X 3mm 16-QFN package.

特性 Features

• Maximum Input Clock Frequency > 2.0 GHz
• Maximum Input Data Rate > 2.5 Gb/s
• 1 ps Maximum of RMS Clock Jitter
• Typically 10 ps of Data Dependent Jitter
• 380 ps Typical Propagation Delay
• 120 ps Typical Rise and Fall Times
• These devices are available in Pb-free package(s). Specifications herein

应用 Application

• High Performance LVDS Clock and Data Distribution for ATE and Networking

简介

NB6N11S属于开发板套件编程器的评估演示板及套件。由制造生产的NB6N11S评估和演示板及套件该系列产品提供了一种方便的方法，在经过验证的实施环境中评估某些重点器件的性能或特性。评估方法通常有完善的文档说明，并且视乎具体情况由评估软件提供支持。产品通常由印刷电路板组成，板上已装有重点器件以及必要或有用的支持元器件，另外也可能包括其他组件，例如电缆或电源。对于数量特别多或类别独特的器件类别(如 ADC、DAC 和开关模式电源)，评估平台可组合为一个单独的产品系列。