NB7L111M数据手册集成电路（IC）的时钟缓冲器驱动器规格书PDF

描述 Description

The NB7L111M is a low skew 2:1:10 differential clock/data driver, designed with clock/data distribution in mind. It accepts two clock/data sources into multiplexer input and reproduces ten identical CML differential outputs. This device is ideal for clock/data distribution across the backplane or a board, and redundant clock switchover applications.The input signals can be either differential or single-ended (if the external reference voltage is provided). Differential inputs incorporate internal 50 Ohm termination resistors and accept Negative ECL (NECL), Positive ECL (PECL), LVCMOS, LVTTL, CML, or LVDS (using appropriate power supplies). The differential 16 mA CML output provides matching internal 50 Ohm termination, and 400 mV output swing when externally terminated 50 Ohm to VCC.The NB7L111M operates from a 2.5 V +/-5% supply or a 3.3 V +/- 5% supply and is guaranteed over the full industrial temperature range of -40C to +85C. This device is packaged in a low profile 8x8 mm, QFN−52 package with 0.5 mm pitch (see package dimension on the back of the datasheet).Application notes, models, and support documentation are available at www.onsemi.com.

特性 Features

• Maximum Input Clock Frequency > 5.5 GHz Typical
• Maximum Input Data Rate > 6.125 Gb/s Typical
•
•
• 50 ps Typical Rise and Fall Times
• 240 ps Typical Propagation Delay
• 2 ps Typical Duty Cycle Skew
• 10 ps Typical Within Device Skew
• 15 ps Typical Device-to-Device Skew
• Operating Range: 2.5 V ±5% and 3.3 V ±5%
• 400 mV Differential CML Output Swing
• 50 Ω Internal Input and Output Termination Resistors
• Pb-Free Packages are Available

应用 Application

• SATA, PCI Express Gen2 4xFC & GbE Data Fan-out
• Precision Clock Distribution / Switchover

简介

NB7L111M属于集成电路（IC）的时钟缓冲器驱动器。由制造生产的NB7L111M时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。