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MT46V128M4

DOUBLE DATA RATE DDR SDRAM

Functional Description The DDR SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write acce

文件:2.55598 Mbytes 页数:68 Pages

MICRON

美光

MT46V128M4

512Mb: x4, x8, x16 Double Data Rate SDRAM Features

Functional Description The DDR SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write acce

文件:1.66163 Mbytes 页数:93 Pages

MICRON

美光

MT46V128M4

512Mb: x4, x8, x16 Double Data Rate (DDR) SDRAM SDRAM Features

文件:1.66163 Mbytes 页数:93 Pages

MICRON

美光

MT46V128M4

512Mb: x4, x8, x16 DDR SDRAM Features

文件:3.76267 Mbytes 页数:91 Pages

MICRON

美光

MT46V128M4

DOUBLE DATA RATE DDR SDRAM

Micron

美光

MT46V128M4TG-75

DOUBLE DATA RATE DDR SDRAM

Functional Description The DDR SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write acce

文件:2.55598 Mbytes 页数:68 Pages

MICRON

美光

MT46V128M4TG-75L

DOUBLE DATA RATE DDR SDRAM

Functional Description The DDR SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write acce

文件:2.55598 Mbytes 页数:68 Pages

MICRON

美光

MT46V128M4TG-75Z

DOUBLE DATA RATE DDR SDRAM

Functional Description The DDR SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write acce

文件:2.55598 Mbytes 页数:68 Pages

MICRON

美光

MT46V128M4TG-75ZL

DOUBLE DATA RATE DDR SDRAM

Functional Description The DDR SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write acce

文件:2.55598 Mbytes 页数:68 Pages

MICRON

美光

MT46V128M4TG-8

DOUBLE DATA RATE DDR SDRAM

Functional Description The DDR SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write acce

文件:2.55598 Mbytes 页数:68 Pages

MICRON

美光

技术参数

  • Data Rate:

    DDR400B

  • Density:

    512Mb

  • FBGA Code:

    D9MLZ

  • Op. Temp.:

    0C to +70C

  • Part Status:

    Production

  • PLP:

    No

  • PLP Start Date:

    N/A

  • Width:

    x4

供应商型号品牌批号封装库存备注价格
MT
24+
TSSOP
305
询价
Micron
17+
6200
询价
MICRON
23+
TSOP-66
5000
原装正品,假一罚十
询价
MICRON
2016+
FBGA60
9000
只做原装,假一罚十,公司可开17%增值税发票!
询价
MICRON
24+
TSOP66
5000
只做原装公司现货
询价
MICRON
25+
FBGA
2789
原装优势!绝对公司现货!
询价
MICRONTECHNO
23+
NA
13650
原装正品,假一罚百!
询价
MICRON
25+23+
TSSOP
33776
绝对原装正品全新进口深圳现货
询价
MICRON
17+
FBGA60
60000
保证进口原装可开17%增值税发票
询价
MICRON
24+
FBGA
20000
全新原厂原装,进口正品现货,正规渠道可含税!!
询价
更多MT46V128M4供应商 更新时间2026-4-17 15:33:00