Quad 2?묲nput NAND Schmitt Trigger

The MC74AC/74ACT132 contains four 2−input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter−free output signals. In addition, they have greater noise margin than conventional NAND gates. Each circuit contains a 2−input Schmitt trigger. The Schm

文件：126.07 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Quad 2?묲nput NAND Schmitt Trigger

The MC74AC/74ACT132 contains four 2−input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter−free output signals. In addition, they have greater noise margin than conventional NAND gates. Each circuit contains a 2−input Schmitt trigger. The Schm

文件：126.07 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Quad 2?묲nput NAND Schmitt Trigger

The MC74AC/74ACT132 contains four 2−input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter−free output signals. In addition, they have greater noise margin than conventional NAND gates. Each circuit contains a 2−input Schmitt trigger. The Schm

文件：126.07 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Quad 2?묲nput NAND Schmitt Trigger

The MC74AC/74ACT132 contains four 2−input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter−free output signals. In addition, they have greater noise margin than conventional NAND gates. Each circuit contains a 2−input Schmitt trigger. The Schm

文件：126.07 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Quad 2?묲nput NAND Schmitt Trigger

The MC74AC/74ACT132 contains four 2−input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter−free output signals. In addition, they have greater noise margin than conventional NAND gates. Each circuit contains a 2−input Schmitt trigger. The Schm

文件：126.07 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

1?뭥f?? Decoder/Demultiplexer

The MC74AC138/74ACT138 is a high−speed 1−of−8 decoder/demultiplexer. This device is ideally suited for high−speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1−of−24 decoder using just three MC74AC138/74ACT138 devices or a 1−of−32 decoder

文件：189.74 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

1?뭥f?? Decoder/Demultiplexer

The MC74AC138/74ACT138 is a high−speed 1−of−8 decoder/demultiplexer. This device is ideally suited for high−speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1−of−24 decoder using just three MC74AC138/74ACT138 devices or a 1−of−32 decoder

文件：195.19 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

Decoder/Demultiplexer

The MC74AC138/74ACT138 is a high−speed 1−of−8 decoder/demultiplexer. This device is ideally suited for high−speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1−of−24 decoder using just three MC74AC138/74ACT138 devices or a 1−of−32 decoder

文件：182.88 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

Decoder/Demultiplexer

The MC74AC138/74ACT138 is a high−speed 1−of−8 decoder/demultiplexer. This device is ideally suited for high−speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1−of−24 decoder using just three MC74AC138/74ACT138 devices or a 1−of−32 decoder

文件：182.88 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

1?뭥f?? Decoder/Demultiplexer

The MC74AC138/74ACT138 is a high−speed 1−of−8 decoder/demultiplexer. This device is ideally suited for high−speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1−of−24 decoder using just three MC74AC138/74ACT138 devices or a 1−of−32 decoder

文件：195.19 Kbytes 页数：11 Pages

ONSEMI

安森美半导体