MC10E167中文资料5.0 V ECL 6-Bit 2:1 Mux-Register数据手册ONSEMI规格书

描述 Description

The MC10E/100E167 contains six 2:1 multiplexers followed by D flip-flops with single-ended outputs. Input data are selected by the Select control, SEL. The selected data are transferred to the flip-flop outputs by a positive edge on CLK1 or CLK2 (or both). A HIGH on the Master Reset (MR) pin asynchronously forces all Q outputs LOW.The 100 Series contains temperature compensation.

特性 Features

• 1000MHz Min. Operating Frequency
• 800ps Max. Clock to Output
• Single-Ended Outputs
• Asynchronous Master Resets
• DualClocks
• PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.7 V
• Internal Input Pulldown Resistors
• ESD Protection: > 1 kV HBM, > 75 V MM
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level 1For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL-94 code V-0 @ 1/8\", Oxygen Index 28 to 34
• Transistor Count = 323 devices
• Pb-Free Packages are Available

简介

MC10E167属于集成电路（IC）的信号开关多路复用器解码器。由制造生产的MC10E167信号开关，多路复用器，解码器逻辑型信号开关、多路复用器和编码器 IC 可用于对以数字格式表示数据的电信号进行路由和选择。这些器件与设计用于模拟信号的类似产品有所不同，它们保留的信息表示为两个电状态之一，而不是两个外部界限内的无穷变化量。