MC10E151中文资料MC10E151: ECL 6-Bit D Register数据手册ONSEMI规格书

描述 Description

The MC10E/100E151 contains 6 D-type, edge-triggered, master-slave flip-flops with differential outputs. Data enters the master when both CLK1 and CLK2 are LOW, and is transferred to the slave when CLK1 or CLK2 (or both) go HIGH. The asynchronous Master Reset (MR) makes all Q outputs go LOW.The 100 Series contains temperature compensation.

特性 Features

1100MHz Min. Toggle Frequency
Differential Outputs
Asynchronous Master Reset
DualClocks
PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.7 V
Internal Input Pulldown Resistors
ESD Protection: > 2 kV HBM, > 200 V MM
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level 1For Additional Information, see Application Note AND8003/D
Flammability Rating: UL-94 code V-0 @ 1/8\", Oxygen Index 28 to 34
Transistor Count = 304 devices
Pb-Free Packages are Available

简介

MC10E151属于集成电路（IC）的触发器。由制造生产的MC10E151触发器触发器是能够存储单个逻辑状态或信息“位”的基本数字存储器件。这些器件至少有两个输入；一个或多个用于传递要存储的数据，另一个用于指示存储该数据的时间点。不同的触发器类型，例如 D（延迟）、SR（置位复位）和 JK，对提供给其输入的信号有不同的响应，可用于实现不同的逻辑功能。这些器件与锁存器的不同之处在于它们是边缘敏感器件，其保持的逻辑状态仅在接收到有效时钟信号时才会改变。