Matched Monolithic Dual Transistor

FEATURES Low VOS (VBE match): 40 μV typical, 100 μV maximum Low TCVOS: 0.5 μV/°C maximum High hFE: 500 minimum Excellent hFE linearity from 10 nA to 10 mA Low noise voltage: 0.23 μV p-p from 0.1 Hz to 10 Hz High breakdown: 45 V min APPLICATIONS Weigh scales Low noise, op amp, front end C

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Matched Monolithic Dual Transistor

FEATURES Low VOS (VBE match): 40 μV typical, 100 μV maximum Low TCVOS: 0.5 μV/°C maximum High hFE: 500 minimum Excellent hFE linearity from 10 nA to 10 mA Low noise voltage: 0.23 μV p-p from 0.1 Hz to 10 Hz High breakdown: 45 V min APPLICATIONS Weigh scales Low noise, op amp, front end C

文件：235.33 Kbytes 页数：12 Pages

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Matched Monolithic Dual Transistor

GENERAL DESCRIPTION The MAT01 is a monolithic dual NPN transistor. An exclusive silicon nitride triple passivation process provides excellent stability of critical parameters over both temperature and time. Matching characteristics include offset voltage of 40 µV, temperature drift of 0.15 µV/°

文件：119.82 Kbytes 页数：8 Pages

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Matched Monolithic Dual Transistor

FEATURES Low VOS (VBE match): 40 μV typical, 100 μV maximum Low TCVOS: 0.5 μV/°C maximum High hFE: 500 minimum Excellent hFE linearity from 10 nA to 10 mA Low noise voltage: 0.23 μV p-p from 0.1 Hz to 10 Hz High breakdown: 45 V min APPLICATIONS Weigh scales Low noise, op amp, front end C

文件：235.33 Kbytes 页数：12 Pages

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亚德诺

Matched Monolithic Dual Transistor

GENERAL DESCRIPTION The MAT01 is a monolithic dual NPN transistor. An exclusive silicon nitride triple passivation process provides excellent stability of critical parameters over both temperature and time. Matching characteristics include offset voltage of 40 µV, temperature drift of 0.15 µV/°

文件：261.459 Kbytes 页数：12 Pages

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亚德诺

Matched Monolithic Dual Transistor

GENERAL DESCRIPTION The MAT01 is a monolithic dual NPN transistor. An exclusive silicon nitride triple passivation process provides excellent stability of critical parameters over both temperature and time. Matching characteristics include offset voltage of 40 µV, temperature drift of 0.15 µV/°

文件：119.82 Kbytes 页数：8 Pages

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Low Noise, Matched Dual Monolithic Transistor

PRODUCT DESCRIPTION The design of the MAT02 series of NPN dual monolithic transistors is optimized for very low noise, low drift and low rBE. Precision Monolithics’ exclusive Silicon Nitride “Triple Passivation” process stabilizes the critical device parameters over wide ranges of temperature a

文件：264.29 Kbytes 页数：12 Pages

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亚德诺

Low Noise, Matched Dual Monolithic Transistor

PRODUCT DESCRIPTION The design of the MAT02 series of NPN dual monolithic transistors is optimized for very low noise, low drift and low rBE. Precision Monolithics’ exclusive Silicon Nitride “Triple Passivation” process stabilizes the critical device parameters over wide ranges of temperature a

文件：264.29 Kbytes 页数：12 Pages

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亚德诺

Low Noise, Matched Dual Monolithic Transistor

PRODUCT DESCRIPTION The design of the MAT02 series of NPN dual monolithic transistors is optimized for very low noise, low drift and low rBE. Precision Monolithics’ exclusive Silicon Nitride “Triple Passivation” process stabilizes the critical device parameters over wide ranges of temperature a

文件：264.29 Kbytes 页数：12 Pages

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亚德诺

Low Noise, Matched Dual Monolithic Transistor

PRODUCT DESCRIPTION The design of the MAT02 series of NPN dual monolithic transistors is optimized for very low noise, low drift and low rBE. Precision Monolithics’ exclusive Silicon Nitride “Triple Passivation” process stabilizes the critical device parameters over wide ranges of temperature a

文件：264.29 Kbytes 页数：12 Pages

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