丝印：LVDS22；Package：TSSOP；DUAL MULTIPLEXED LVDS REPEATERS

FEATURES · Meets or Exceeds the Requirements of ANSI TIA/EIA-644-1995 Standard · Designed for Clock Rates up to 200 MHz (400 Mbps) · Designed for Data Rates up to 250 Mbps · Pin Compatible With SN65LVDS122 and SN65LVDT122, 1.5 Gbps 2x2 Crosspoint Switch From TI · ESD Protection Exceeds 12

文件：264.13 Kbytes 页数：17 Pages

TI

德州仪器

丝印：LVDS22；Package：TSSOP；DUAL MULTIPLEXED LVDS REPEATERS

FEATURES · Meets or Exceeds the Requirements of ANSI TIA/EIA-644-1995 Standard · Designed for Clock Rates up to 200 MHz (400 Mbps) · Designed for Data Rates up to 250 Mbps · Pin Compatible With SN65LVDS122 and SN65LVDT122, 1.5 Gbps 2x2 Crosspoint Switch From TI · ESD Protection Exceeds 12

文件：264.13 Kbytes 页数：17 Pages

TI

德州仪器

丝印：LVDS22；Package：TSSOP；DUAL MULTIPLEXED LVDS REPEATERS

FEATURES · Meets or Exceeds the Requirements of ANSI TIA/EIA-644-1995 Standard · Designed for Clock Rates up to 200 MHz (400 Mbps) · Designed for Data Rates up to 250 Mbps · Pin Compatible With SN65LVDS122 and SN65LVDT122, 1.5 Gbps 2x2 Crosspoint Switch From TI · ESD Protection Exceeds 12

文件：264.13 Kbytes 页数：17 Pages

TI

德州仪器

丝印：LVDS22；Package：TSSOP；DUAL MULTIPLEXED LVDS REPEATERS

FEATURES · Meets or Exceeds the Requirements of ANSI TIA/EIA-644-1995 Standard · Designed for Clock Rates up to 200 MHz (400 Mbps) · Designed for Data Rates up to 250 Mbps · Pin Compatible With SN65LVDS122 and SN65LVDT122, 1.5 Gbps 2x2 Crosspoint Switch From TI · ESD Protection Exceeds 12

文件：264.13 Kbytes 页数：17 Pages

TI

德州仪器

丝印：LVDS250；Package：TSSOP；LVDS 4x4 CROSSPOINT SWITCH

FEATURES · Greater Than 2.0 Gbps Operation · Nonblocking Architecture Allows Each Output to be Connected to Any Input · Pk-Pk Jitter: – 60 ps Typical at 2.0 Gbps – 110 ps Typical at 2.5 Gbps · Compatible With ANSI TIA/EIA-644-A LVDS Standard · Available Packaging 38-Pin TSSOP · 25 mV of

文件：498.01 Kbytes 页数：22 Pages

TI

德州仪器

丝印：LVDS250；Package：TSSOP；LVDS 4x4 CROSSPOINT SWITCH

FEATURES · Greater Than 2.0 Gbps Operation · Nonblocking Architecture Allows Each Output to be Connected to Any Input · Pk-Pk Jitter: – 60 ps Typical at 2.0 Gbps – 110 ps Typical at 2.5 Gbps · Compatible With ANSI TIA/EIA-644-A LVDS Standard · Available Packaging 38-Pin TSSOP · 25 mV of

文件：498.01 Kbytes 页数：22 Pages

TI

德州仪器

丝印：LVDS250；Package：TSSOP；LVDS 4x4 CROSSPOINT SWITCH

FEATURES · Greater Than 2.0 Gbps Operation · Nonblocking Architecture Allows Each Output to be Connected to Any Input · Pk-Pk Jitter: – 60 ps Typical at 2.0 Gbps – 110 ps Typical at 2.5 Gbps · Compatible With ANSI TIA/EIA-644-A LVDS Standard · Available Packaging 38-Pin TSSOP · 25 mV of

文件：498.01 Kbytes 页数：22 Pages

TI

德州仪器

丝印：LVDS250；Package：TSSOP；LVDS 4x4 CROSSPOINT SWITCH

FEATURES · Greater Than 2.0 Gbps Operation · Nonblocking Architecture Allows Each Output to be Connected to Any Input · Pk-Pk Jitter: – 60 ps Typical at 2.0 Gbps – 110 ps Typical at 2.5 Gbps · Compatible With ANSI TIA/EIA-644-A LVDS Standard · Available Packaging 38-Pin TSSOP · 25 mV of

文件：498.01 Kbytes 页数：22 Pages

TI

德州仪器

丝印：LVDS250；Package：TSSOP；LVDS 4x4 CROSSPOINT SWITCH

FEATURES · Greater Than 2.0 Gbps Operation · Nonblocking Architecture Allows Each Output to be Connected to Any Input · Pk-Pk Jitter: – 60 ps Typical at 2.0 Gbps – 110 ps Typical at 2.5 Gbps · Compatible With ANSI TIA/EIA-644-A LVDS Standard · Available Packaging 38-Pin TSSOP · 25 mV of

文件：498.01 Kbytes 页数：22 Pages

TI

德州仪器

丝印：LVDS32B；Package：SOIC；HIGH-SPEED DIFFERENTIAL RECEIVERS

FEATURES · Meets or Exceeds the Requirements of ANSI EIA/TIA-644 Standard for Signaling Rates (1) up to 400 Mbps · Operates With a Single 3.3-V Supply · –2-V to 4.4-V Common-Mode Input Voltage Range · Differential Input Thresholds

文件：314.49 Kbytes 页数：23 Pages

TI

德州仪器