128K X 8 BIT LOW VOLTAGE CMOS SRAM

General Description The LP62S1024B-I is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a low power voltage: 2.7V to 3.6V. It is built using AMICs high performance CMOS process. Inputs and three-state outputs are TTL compatibl

文件：246.05 Kbytes 页数：17 Pages

AMICC

联笙电子

128K X 8 BIT LOW VOLTAGE CMOS SRAM

General Description The LP62S1024B-T is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a low power voltage: 2.7V to 3.6V. It is built using AMICs high performance CMOS process. Inputs and three-state outputs are TTL compatibl

文件：197.16 Kbytes 页数：18 Pages

AMICC

联笙电子

128K X 8 BIT LOW VOLTAGE CMOS SRAM

General Description The LP62S1024B-T is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a low power voltage: 2.7V to 3.6V. It is built using AMICs high performance CMOS process. Inputs and three-state outputs are TTL compatibl

文件：197.16 Kbytes 页数：18 Pages

AMICC

联笙电子

128K X 8 BIT LOW VOLTAGE CMOS SRAM

General Description The LP62S1024B-I is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a low power voltage: 2.7V to 3.6V. It is built using AMICs high performance CMOS process. Inputs and three-state outputs are TTL compatibl

文件：246.05 Kbytes 页数：17 Pages

AMICC

联笙电子

128K X 8 BIT LOW VOLTAGE CMOS SRAM

General Description The LP62S1024B-I is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a low power voltage: 2.7V to 3.6V. It is built using AMICs high performance CMOS process. Inputs and three-state outputs are TTL compatibl

文件：246.05 Kbytes 页数：17 Pages

AMICC

联笙电子

128K X 8 BIT LOW VOLTAGE CMOS SRAM

General Description The LP62S1024B-T is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a low power voltage: 2.7V to 3.6V. It is built using AMICs high performance CMOS process. Inputs and three-state outputs are TTL compatibl

文件：197.16 Kbytes 页数：18 Pages

AMICC

联笙电子

128K X 8 BIT LOW VOLTAGE CMOS SRAM

General Description The LP62S1024B-T is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a low power voltage: 2.7V to 3.6V. It is built using AMICs high performance CMOS process. Inputs and three-state outputs are TTL compatibl

文件：197.16 Kbytes 页数：18 Pages

AMICC

联笙电子

128K X 16 BIT LOW VOLTAGE CMOS SRAM

General Description The LP62S16128B-I is a low operating current 2,097,152-bit static random access memory organized as 131,072 words by 16 bits and operates on low power voltage from 2.7V to 3.6V. It is built using AMICs high performance CMOS process. Inputs and three-state outputs are TTL comp

文件：160.12 Kbytes 页数：14 Pages

AMICC

联笙电子

128K X 16 BIT LOW VOLTAGE CMOS SRAM

General Description The LP62S16128B-T is a low operating current 2,097,152-bit static random access memory organized as 131,072 words by 16 bits and operates on low power voltage from 2.7V to 3.6V. It is built using AMICs high performance CMOS process. Inputs and three-state outputs are TTL comp

文件：160.05 Kbytes 页数：14 Pages

AMICC

联笙电子

128K X 16 BIT LOW VOLTAGE CMOS SRAM

General Description The LP62S16128B-I is a low operating current 2,097,152-bit static random access memory organized as 131,072 words by 16 bits and operates on low power voltage from 2.7V to 3.6V. It is built using AMICs high performance CMOS process. Inputs and three-state outputs are TTL comp

文件：160.12 Kbytes 页数：14 Pages

AMICC

联笙电子