8 通道输出 LVDS 1.8V、2.5V 和 3.3V 缓冲器

The LMK1D120x clock buffer distributes one of two selectable clock inputs (IN0 and IN1) to 4 or 8 pairs of differential LVDS clock outputs (OUT0 through OUT7) with minimum skew for clock distribution. The LMK1D12x family can accept two clock sources into an input multiplexer. The inputs can either b • High-performance LVDS clock buffer family with 2 inputs and 4 (2:4) or 8 (2:8) outputs.\n• Supply voltage: 1.71 V to 3.465 V\n• Very low propagation delay: \n• Universal inputs accept LVDS, LVPECL, LVCMOS, LP-HCSL, HCSL and CML inputs\n• Industrial temperature range: –40°C to 105°C\n• LMK1D1204;

TI

德州仪器

LMK1D210xL Ultra Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family: up to 2GHz – Dual 1:2 differential buffer – Dual 1:4 differential buffer – Dual 1:6 differential buffer – Dual 1:8 differential buffer • Supply voltage: 1.71V to 3.465V • Dual output common mode voltage operation: – Output common mod

文件：2.44589 Mbytes 页数：46 Pages

TI

德州仪器

LMK1D1204P Pin-Controlled OE Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family with 2 inputs and 4 outputs (2:4) • Output frequency up to 2 GHz • Hardware pins for individual output enable/disable • Supply voltage: 1.8 V / 2.5 V / 3.3 V ± 5% • Low additive jitter:

文件：1.17422 Mbytes 页数：32 Pages

TI

德州仪器

LMK1D210xL Ultra Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family: up to 2GHz – Dual 1:2 differential buffer – Dual 1:4 differential buffer – Dual 1:6 differential buffer – Dual 1:8 differential buffer • Supply voltage: 1.71V to 3.465V • Dual output common mode voltage operation: – Output common mod

文件：2.47737 Mbytes 页数：46 Pages

TI

德州仪器

LMK1D210xL Ultra Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family: up to 2GHz – Dual 1:2 differential buffer – Dual 1:4 differential buffer – Dual 1:6 differential buffer – Dual 1:8 differential buffer • Supply voltage: 1.71V to 3.465V • Dual output common mode voltage operation: – Output common mod

文件：2.47174 Mbytes 页数：46 Pages

TI

德州仪器

LMK1D210xL Ultra Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family: up to 2GHz – Dual 1:2 differential buffer – Dual 1:4 differential buffer – Dual 1:6 differential buffer – Dual 1:8 differential buffer • Supply voltage: 1.71V to 3.465V • Dual output common mode voltage operation: – Output common mod

文件：2.47174 Mbytes 页数：46 Pages

TI

德州仪器

LMK1D210xL Ultra Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family: up to 2GHz – Dual 1:2 differential buffer – Dual 1:4 differential buffer – Dual 1:6 differential buffer – Dual 1:8 differential buffer • Supply voltage: 1.71V to 3.465V • Dual output common mode voltage operation: – Output common mod

文件：2.47737 Mbytes 页数：46 Pages

TI

德州仪器

LMK1D210xL Ultra Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family: up to 2GHz – Dual 1:2 differential buffer – Dual 1:4 differential buffer – Dual 1:6 differential buffer – Dual 1:8 differential buffer • Supply voltage: 1.71V to 3.465V • Dual output common mode voltage operation: – Output common mod

文件：2.44589 Mbytes 页数：46 Pages

TI

德州仪器

LMK1D210xL Ultra Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family: up to 2GHz – Dual 1:2 differential buffer – Dual 1:4 differential buffer – Dual 1:6 differential buffer – Dual 1:8 differential buffer • Supply voltage: 1.71V to 3.465V • Dual output common mode voltage operation: – Output common mod

文件：2.44589 Mbytes 页数：46 Pages

TI

德州仪器

LMK1D1204P Pin-Controlled OE Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family with 2 inputs and 4 outputs (2:4) • Output frequency up to 2 GHz • Hardware pins for individual output enable/disable • Supply voltage: 1.8 V / 2.5 V / 3.3 V ± 5% • Low additive jitter:

文件：1.17422 Mbytes 页数：32 Pages

TI

德州仪器