LMK1D210xL Ultra Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family: up to 2GHz – Dual 1:2 differential buffer – Dual 1:4 differential buffer – Dual 1:6 differential buffer – Dual 1:8 differential buffer • Supply voltage: 1.71V to 3.465V • Dual output common mode voltage operation: – Output common mod

文件：2.47174 Mbytes 页数：46 Pages

TI

德州仪器

LMK1D210xL Ultra Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family: up to 2GHz – Dual 1:2 differential buffer – Dual 1:4 differential buffer – Dual 1:6 differential buffer – Dual 1:8 differential buffer • Supply voltage: 1.71V to 3.465V • Dual output common mode voltage operation: – Output common mod

文件：2.47737 Mbytes 页数：46 Pages

TI

德州仪器

LMK1D210xL Ultra Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family: up to 2GHz – Dual 1:2 differential buffer – Dual 1:4 differential buffer – Dual 1:6 differential buffer – Dual 1:8 differential buffer • Supply voltage: 1.71V to 3.465V • Dual output common mode voltage operation: – Output common mod

文件：2.44589 Mbytes 页数：46 Pages

TI

德州仪器

LMK1D1204P Pin-Controlled OE Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family with 2 inputs and 4 outputs (2:4) • Output frequency up to 2 GHz • Hardware pins for individual output enable/disable • Supply voltage: 1.8 V / 2.5 V / 3.3 V ± 5% • Low additive jitter:

文件：1.17422 Mbytes 页数：32 Pages

TI

德州仪器

LMK1D121x Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family: up to 2 GHz – 2:12 differential buffer (LMK1D1212) – 2:16 differential buffer (LMK1D1216) • Supply voltage: 1.71 V to 3.465 V • Low additive jitter:

文件：2.82787 Mbytes 页数：37 Pages

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LMK1D120x Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family with 2 inputs and 4 (2:4) or 8 (2:8) outputs. • Output frequency up to 2 GHz. • Supply voltage: 1.71 V to 3.465 V • Low additive jitter:

文件：1.39132 Mbytes 页数：35 Pages

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德州仪器

LMK1D1208I I2C-Configurable, Low-Additive Jitter LVDS Buffer

文件：2.50396 Mbytes 页数：43 Pages

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丝印：LMK1D1208I；Package：VQFN；LMK1D1208I I2C-Configurable, Low-Additive Jitter LVDS Buffer

文件：2.50396 Mbytes 页数：43 Pages

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德州仪器

丝印：LMK1D1208I；Package：VQFN；LMK1D1208I I2C-Configurable, Low-Additive Jitter LVDS Buffer

文件：2.50396 Mbytes 页数：43 Pages

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8-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer with I2C

• High-performance LVDS clock buffer family with 2 inputs and 8 outputs\n• Supply voltage: 1.8 V / 2.5 V / 3.3 V ± 5%\n• Individual input and output enable/disable \n• Bank input multiplexer \n• Four programmable I2C addresses through IDX pins\n• Very low propagation delay: AC_REF, available f;

TI

德州仪器