丝印：JM38510；Package：CDIP；TL07xx Low-Noise FET-Input Operational Amplifiers

1 Features • High slew rate: 20 V/μs (TL07xH, typ) • Low offset voltage: 1 mV (TL07xH, typ) • Low offset voltage drift: 2 μV/°C • Low power consumption: 940 μA/ch (TL07xH, typ) • Wide common-mode and differential voltage ranges – Common-mode input voltage range includes VCC+ • Low input b

文件：5.57704 Mbytes 页数：86 Pages

TI

德州仪器

8-BIT ADDRESSABLE LATCHES

TI

德州仪器

丝印：JM38510；Package：CDIP；CMOS Quad Bilateral Switch

文件：1.38251 Mbytes 页数：33 Pages

TI

德州仪器

丝印：JM38510；Package：CDIP；TL07xx Low-Noise JFET-Input Operational Amplifiers

文件：2.8721 Mbytes 页数：69 Pages

TI

德州仪器

丝印：JM38510；Package：CDIP；TL07xx Low-Noise FET-Input Operational Amplifiers

文件：5.88015 Mbytes 页数：90 Pages

TI

德州仪器

丝印：JM38510；Package：CDIP；TL07xx Low-Noise FET-Input Operational Amplifiers

文件：5.88015 Mbytes 页数：90 Pages

TI

德州仪器

丝印：JM38510/00104BCA；Package：CDIP；SNx400, SNx4LS00, and SNx4S00 Quadruple 2-Input Positive-NAND Gates

1 Features 1• Package Options Include: – Plastic Small-Outline (D, NS, PS) – Shrink Small-Outline (DB) – Ceramic Flat (W) – Ceramic Chip Carriers (FK) – Standard Plastic (N) – Ceramic (J) • Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package • Inputs Are TTL C

文件：1.69212 Mbytes 页数：38 Pages

TI

德州仪器

丝印：JM38510/00104BDA；Package：CFP；SNx400, SNx4LS00, and SNx4S00 Quadruple 2-Input Positive-NAND Gates

1 Features 1• Package Options Include: – Plastic Small-Outline (D, NS, PS) – Shrink Small-Outline (DB) – Ceramic Flat (W) – Ceramic Chip Carriers (FK) – Standard Plastic (N) – Ceramic (J) • Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package • Inputs Are TTL C

文件：1.69212 Mbytes 页数：38 Pages

TI

德州仪器

丝印：00303BCA；Package：CDIP；QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS

description These devices contain four independent 2-input NAND buffer gates with open-collector outputs. The open- collector outputs require pull-up resistors to perform correctly. They may be connected to other open- collector outputs to implement active-low wired-OR or active-high wired-A

文件：1.32219 Mbytes 页数：24 Pages

TI

德州仪器

丝印：JM38510/05001BCA；Package：CDIP；CMOS NAND Gates

Features: Quiescent current specified to 15 V Maximum input leakage of 1 uA at 15 V (full package-temperature range) 1-V noise margin (full package-temperature range)

文件：550.23 Kbytes 页数：10 Pages

TI

德州仪器