Differential data strobe

文件：1.65495 Mbytes 页数：48 Pages

ISSI

矽成半导体

1.8V DDR2 SDRAM

·Single supply voltage of 1.8V ± 0.1V\n·SSTL_18 compatible inputs\n·Data masking per byte on Write commands\n·Programmable burst length of 4 or 8\n·Programmable CAS Latency of 3, 4, 5 or 6\n·Auto-Refresh and Self-Refresh Modes\n·OCD (Off-Chip Driver Impedance Adjustment)\n·ODT (On Die Termination) s

ISSI

矽成半导体

1.8V DDR2 SDRAM

·Single supply voltage of 1.8V ± 0.1V\n·SSTL_18 compatible inputs\n·Data masking per byte on Write commands\n·Programmable burst length of 4 or 8\n·Programmable CAS Latency of 3, 4, 5 or 6\n·Auto-Refresh and Self-Refresh Modes\n·OCD (Off-Chip Driver Impedance Adjustment)\n·ODT (On Die Termination) s

ISSI

矽成半导体

动态随机存储器(DRAM)

Integrated Silicon Solution

Package：60-TFBGA；包装：卷带（TR） 类别：集成电路（IC） 存储器 描述：IC DRAM 512MBIT PARALLEL 60TWBGA

ISSI, Integrated Silicon Solution Inc

Package：60-TFBGA；包装：卷带（TR） 类别：集成电路（IC） 存储器 描述：IC DRAM 512MBIT PARALLEL 60TWBGA

ISSI, Integrated Silicon Solution Inc

Package：60-TFBGA；包装：管件 类别：集成电路（IC） 存储器 描述：IC DRAM 512MBIT PARALLEL 60TWBGA

ISSI, Integrated Silicon Solution Inc