丝印：046N8L5；Package：PG-TSON-8；OptiMOSTM 5 Power-Transistor, 80 V

Features • Optimized for high performance SMPS, e.g. synchronous rectification • N-channel, logic level • Very low on-resistance RDS(on) • Superior thermal resistance • 100 avalanche tested • Pb-free lead plating; RoHS compliant • Halogen-free according to IEC61249-2-21

文件：1.106 Mbytes 页数：11 Pages

INFINEON

英飞凌

OptiMOS ™ 5 功率 MOSFET 80 V 逻辑电平 PQFN 3.3x3.3Source-Down 封装

IQE046N08LM5 是英飞凌最新推出的 OptiMOS ™功率 MOSFET，80 V 逻辑电平，采用 PQFN 3.3x3.3源极朝下封装，在 25˚C 时提供业界最低的导通电阻 RDS(on) 和卓越的热性能。OptiMOS ™ Source-Down 是一种革命性的技术，其内部采用倒装硅片，具有多种优势，例如更好的热性能、更高的功率密度和改进的布局可能性。结合工业标准 PQFN 3.3x3.3封装，IQE046N08LM5 适用于电信和数据服务器中常见的高功率密度和性能 SMPS 产品。 • 逻辑层允许更低的 Qrr\n• 相比 PQFN，RthJC 有所改进\n• 针对并联进行了中心栅极优化;

Infineon

英飞凌

丝印：046N8C5；Package：PG-TTFN-9；OptiMOSTM 5 Power-Transistor, 80 V

Features • Optimized for high performance SMPS, e.g. synchronous rectification • N-channel, logic level • Very low on-resistance RDS(on) • Superior thermal resistance • 100 avalanche tested • Pb-free lead plating; RoHS compliant • Halogen-free according to IEC61249-2-21

文件：1.14215 Mbytes 页数：11 Pages

INFINEON

英飞凌

丝印：R；Package：PG-WHTFN-9；OptiMOSTM 5 Power-Transistor, 80 V

Features • Optimized for high performance SMPS, e.g. synchronous rectification • N-channel, logic level • Very low on-resistance RDS(on) • Superior thermal resistance • 100 avalanche tested • Pb-free lead plating; RoHS compliant • Halogen-free according to IEC61249-2-21

文件：1.30531 Mbytes 页数：11 Pages

INFINEON

英飞凌

丝印：E；Package：PG-WHSON-8；OptiMOSTM 5 Power-Transistor, 80 V

Features • Optimized for high performance SMPS, e.g. synchronous rectification • N-channel, logic level • Very low on-resistance RDS(on) • Superior thermal resistance • 100 avalanche tested • Pb-free lead plating; RoHS compliant • Halogen-free according to IEC61249-2-21

文件：1.38441 Mbytes 页数：11 Pages

INFINEON

英飞凌

OptiMOS ™ 5 功率 MOSFET 80 V 逻辑电平 PQFN 3.3x3.3源极-下部中心-栅极 DSC 封装

\n优势:\n• Enabling highest power density and performance• Superior thermal performance• Optimized layout possibilities for efficient use of real-estate• Simplifying parallel configuration of multiple MOSFETs;

Infineon

英飞凌

OptiMOS™ 5 power MOSFET 80 V logic level in PQFN 3.3x3.3 Source-Down DSC package

\n优势:\n• Enabling highest power density and performance\n• Superior thermal performance\n• Optimized layout possibilities for efficient use of real-estate\n• Reduced PCB losses;

Infineon

英飞凌