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XA6SLX16-2FTG256IW全球热点,Xilinx新品NEW!!!

2020-6-28 8:10:00

XA6SLX16-2FTG256I来自Xilinx说明:FPGA XA Spartan®-6 Family 14579 Cells 45nm (CMOS) Technology 1.2V 256-Pin TFBGA 到货63PCS现正供货中。

最新数据统计---近29天成交:2363单,累计:83052万元,心得:22123条

现货库存:351121种,总值:66353万元,评价:15153条

产品图片:现货XA6SLX16-2FTG256I拍摄如(附件)

参考产品型:

XA6SLX4

XA6SLX9

XA6SLX16

XA6SLX25

XA6SLX45

XA6SLX75

XA6SLX100

XA6SLX25T

XA6SLX45T

XA6SLX75T

产品描述:

The Xilinx Automotive (XA) Spartan®-6 family of FPGAs provides leading system integration capabilities with the lowest total cost for highvolume automotive applications. The ten-member family delivers expanded densities ranging from 3,840 to 101,261 logic cells and faster, more comprehensive connectivity. Built on a mature 45 nm low-power copper process technology that delivers the optimal balance of cost, power, and performance, the XA Spartan-6 family offers a new, more efficient, dual-register 6-input look-up table (LUT) logic and a rich selection of built-in system-level blocks. These include 18 Kb (2 x 9 Kb) block RAMs, second generation DSP48A1 slices, SDRAM memory controllers, enhanced mixed-mode clock management blocks, SelectIO technology, power-optimized high-speed serial transceiver blocks, PCI Express® compatible Endpoint blocks, advanced system-level power management modes, auto-detect configuration options, and enhanced IP security with AES and Device DNA protection. These features provide a low-cost programmable alternative to custom ASIC products with unprecedented ease of use. XA Spartan-6 FPGAs offer the best solution for flexible and scalable high-volume logic designs, high-bandwidth parallel DSP processing designs, and cost-sensitive applications where multiple interfacing standards are required. XA Spartan-6 FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver integrated software and hardware components that enable designers to focus on innovation as soon as their development cycle begins.

关键特性:

Key Features

XA Spartan-6 LX FPGA: Logic optimized

Automotive Temperatures:

I-Grade: Tj = –40°C to +100°C

Q-Grade: Tj = –40°C to +125°C

Automotive Standards:

Xilinx is ISO-TS16949 compliant

AEC-Q100 qualification

Production Part Approval Process (PPAP) documentation

Beyond AEC-Q100 qualification is available upon request

Designed for low cost

Multiple efficient integrated blocks

Optimized selection of I/O standards

Staggered pads

High-volume plastic wire-bonded packages

Low static and dynamic power

45 nm process optimized for cost and low power

Hibernate power-down mode for zero power

Suspend mode maintains state and configuration with multipin wake-up, control enhancement

High performance 1.2V core voltage (LX and LXT FPGAs, -2 and -3 speed grades)

Multi-voltage, multi-standard SelectIO interface banks

Up to 1,080 Mb/s data transfer rate per differential I/O

Selectable output drive, up to 24 mA per pin

3.3V to 1.2V I/O standards and protocols

Low-cost HSTL and SSTL memory interfaces

Hot swap compliance

Adjustable I/O slew rates to improve signal integrity

Efficient DSP48A1 slices

High-performance arithmetic and signal processing

Fast 18 x 18 multiplier and 48-bit accumulator

Pipelining and cascading capability

Pre-adder to assist filter applications

Integrated Memory Controller blocks

DDR, DDR2, DDR3, and LPDDR support

Data rates up to 800 Mb/s

Multi-port bus structure with independent FIFO to reduce design timing issues

Abundant logic resources with increased logic capacity

Optional shift register or distributed RAM support

Efficient 6-input LUTs improve performance and minimize power

LUT with dual flip-flops for pipeline centric applications

Block RAM with a wide range of granularity

Fast block RAM with byte write enable

18 Kb blocks that can be optionally programmed as two independent 9 Kb block RAMs

Clock Management Tile (CMT) for enhanced performance

Low noise, flexible clocking

Digital Clock Managers (DCMs) eliminate clock skew and duty cycle distortion

Phase-Locked Loops (PLLs) for low-jitter clocking

Frequency synthesis with simultaneous multiplication, division, and phase shifting

Sixteen low-skew global clock networks

Simplified configuration, supports low-cost standards

2-pin auto-detect configuration

Broad third-party SPI (up to x4) and NOR flash support

MultiBoot support for remote upgrade with multiple bitstreams, using watchdog protection

Enhanced security for design protection

Low-cost PCI® technology support compatible with the 33 MHz, 32

and 64-bit specification.

Faster embedded processing with enhanced, low cost, MicroBlaze™ 32-bit soft processor

Industry-leading IP and reference designs

Strong automotive-specific third-party ecosystem with IP, development boards, and design services

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