System Peripheral Clock Source

Description The ICS650-21 is a low cost, low jitter, high performance clock synthesizer for system peripheral applications. Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts a parallel resonant 25 MHz crystal input to produce up to eight output clocks. The device provide

文件：63.12 Kbytes 页数：4 Pages

ICST

IC CLK SOURCE SYSTEM PER 20-SSOP

Renesas

瑞萨

Package：20-SSOP（0.154"，3.90mm 宽）；包装：管件 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC CLK SOURCE SYSTEM PER 20-SSOP

Renesas Electronics America Inc

System Peripheral Clock Source

Description The ICS650-21 is a low cost, low jitter, high performance clock synthesizer for system peripheral applications. Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts a parallel resonant 25 MHz crystal input to produce up to eight output clocks. The device provide

文件：63.12 Kbytes 页数：4 Pages

ICST

System Peripheral Clock Source

Description The ICS650-21 is a low cost, low jitter, high performance clock synthesizer for system peripheral applications. Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts a parallel resonant 25 MHz crystal input to produce up to eight output clocks. The device provide

文件：63.12 Kbytes 页数：4 Pages

ICST

System Peripheral Clock Source

Description The ICS650-21 is a low cost, low jitter, high performance clock synthesizer for system peripheral applications. Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts a parallel resonant 25 MHz crystal input to produce up to eight output clocks. The device provide

文件：63.12 Kbytes 页数：4 Pages

ICST

丝印：ICS650R-21L；Package：SSOP；SYSTEM PERIPHERAL CLOCK SOURCE

Features • Packaged in 20-pin SSOP (QSOP) • Pb (lead) free package, RoHS compliant • Lower jitter version of ICS650-01 • Operating voltage of 3.3 V or 5 V • Zero ppm synthesis error in all clocks • Inexpensive 25 MHz crystal or clock input • Provides Ethernet and Fast Ethernet clocks • Pro

文件：357.46 Kbytes 页数：9 Pages

RENESAS

瑞萨

丝印：ICS650R-21L；Package：SSOP；SYSTEM PERIPHERAL CLOCK SOURCE

Features • Packaged in 20-pin SSOP (QSOP) • Pb (lead) free package, RoHS compliant • Lower jitter version of ICS650-01 • Operating voltage of 3.3 V or 5 V • Zero ppm synthesis error in all clocks • Inexpensive 25 MHz crystal or clock input • Provides Ethernet and Fast Ethernet clocks • Pro

文件：357.46 Kbytes 页数：9 Pages

RENESAS

瑞萨

丝印：ICS650R-21L；Package：SSOP；SYSTEM PERIPHERAL CLOCK SOURCE

文件：202.34 Kbytes 页数：8 Pages

IDT

丝印：ICS650R-21L；Package：SSOP；SYSTEM PERIPHERAL CLOCK SOURCE

文件：202.34 Kbytes 页数：8 Pages

IDT