ICS650R-21集成电路（IC）的时钟发生器PLL频率合成器规格书PDF中文资料

描述 Description

The ICS650-21 is a low cost, low jitter, high performance clock synthesizer for system peripheral applications. Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts a parallel resonant 25 MHz crystal input to produce up to eight output clocks. The device provides clocks for PCI, SCSI, Fast Ethernet, Ethernet, USB, and AC97. The user can select one of three USB frequencies, and also one of two AC97 audio frequencies. The OE pin puts all outputs into a high impedance state for board level testing. All frequencies are generated with less than one ppm error, meeting the demands of SCSI and Ethernet clocking.

The ICS650 can be mask customized to produce any frequencies from 1 to 150 MHz.

特性 Features

• Packaged in 20 pin tiny SSOP (QSOP)

• Lower jitter version of ICS650-01

• Operating VDD of 3.3V or 5V

• Zero ppm synthesis error in all clocks

• Inexpensive 25 MHz crystal or clock input

• Provides Ethernet and Fast Ethernet clocks

• Provides SCSI clocks

• Provides PCI clocks

• Selectable AC97 audio clock

• Selectable USB clock

• OE pin tri-states the outputs for testing

• Selectable frequencies on three clocks

• Duty cycle of 45/55 for Processor clock and Audio clock

• Advanced, low power CMOS process