Clock Slicer User Configurable PECL Input Zero Delay Buffer

Description The ICS527-02 Clock Slicer is the most flexible way to generate a CMOS output clock from a PECL input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer mul

文件：162.16 Kbytes 页数：8 Pages

ICST

IC CLOCK SLICER ZD BUFFER 28SSOP

Renesas

瑞萨

Package：28-SSOP（0.154"，3.90mm 宽）；包装：管件 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC CLOCK SLICER ZD BUFFER 28SSOP

Renesas Electronics America Inc

Clock Slicer User Configurable PECL Input Zero Delay Buffer

Description The ICS527-02 Clock Slicer is the most flexible way to generate a CMOS output clock from a PECL input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer mul

文件：162.16 Kbytes 页数：8 Pages

ICST

Clock Slicer User Configurable PECL Input Zero Delay Buffer

Description The ICS527-02 Clock Slicer is the most flexible way to generate a CMOS output clock from a PECL input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer mul

文件：162.16 Kbytes 页数：8 Pages

ICST

Clock Slicer User Configurable PECL Input Zero Delay Buffer

Description The ICS527-02 Clock Slicer is the most flexible way to generate a CMOS output clock from a PECL input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer mul

文件：162.16 Kbytes 页数：8 Pages

ICST

Clock Slicer User Configurable PECL Input Zero Delay Buffer

Renesas

瑞萨

Package：28-SSOP（0.154"，3.90mm 宽）；包装：管件 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC CLOCK SLICER ZD BUFFER 28SSOP

Renesas Electronics America Inc