丝印：2309；Package：SOT-23；P-Channel Enhancement Mode Power MOSFET

文件：418.91 Kbytes 页数：6 Pages

HMSEMI

华之美半导体

P-Channel 60V(D-S)

文件：1.47975 Mbytes 页数：5 Pages

HMSEMI

华之美半导体

P沟道 低压MOS

HmpowerSemi

虹美功率

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2309 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309 is

文件：135.34 Kbytes 页数：10 Pages

IDT

CDMA IF VGAs and I/Q Demodulators with VCO and Synthesizer

General Description The MAX2306/MAX2308/MAX2309 are IF receivers designed for dual-band, dual-mode, and single-mode N-CDMA and W-CDMA cellular phone systems. The signal path consists of a variable-gain amplifier (VGA) and I/Q demodulator. The devices feature guaranteed +2.7V operation, a gain con

文件：295.07 Kbytes 页数：20 Pages

MAXIM

美信

CDMA IF VGAs and I/Q Demodulators with VCO and Synthesizer

General Description The MAX2306/MAX2308/MAX2309 are IF receivers designed for dual-band, dual-mode, and single-mode N-CDMA and W-CDMA cellular phone systems. The signal path consists of a variable-gain amplifier (VGA) and I/Q demodulator. The devices feature guaranteed +2.7V operation, a gain con

文件：295.07 Kbytes 页数：20 Pages

MAXIM

美信