8-stage shift-and-store bus register

DESCRIPTION The HEF4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs O0 to O7. The parallel outputs may be connected directly to common bus lines.

文件：81.02 Kbytes 页数：7 Pages

PHI

飞利浦

8-stage shift-and-store bus register

General description The HEF4094B is an 8-stage serial shift register. It has a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs QP0 to QP7. The parallel outputs may be connected directly to common bus lines. Data is shifted on p

文件：103.36 Kbytes 页数：17 Pages

恩XP

8-stage shift-and-store register

1. General description The HEF4094B is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading.

文件：263.2 Kbytes 页数：15 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

8-stage shift-and-store register Rev. 11 ??29 August 2013

文件：204.26 Kbytes 页数：20 Pages

恩XP

8-stage shift-and-store bus register

DESCRIPTION The HEF4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs O0 to O7. The parallel outputs may be connected directly to common bus lines.

文件：81.02 Kbytes 页数：7 Pages

PHI

飞利浦

8-stage shift-and-store bus register

DESCRIPTION The HEF4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs O0 to O7. The parallel outputs may be connected directly to common bus lines.

文件：81.02 Kbytes 页数：7 Pages

PHI

飞利浦

8-stage shift-and-store bus register

DESCRIPTION The HEF4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs O0 to O7. The parallel outputs may be connected directly to common bus lines.

文件：81.02 Kbytes 页数：7 Pages

PHI

飞利浦

8-stage shift-and-store bus register

DESCRIPTION The HEF4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs O0 to O7. The parallel outputs may be connected directly to common bus lines.

文件：81.02 Kbytes 页数：7 Pages

PHI

飞利浦

8-stage shift-and-store bus register

General description The HEF4094B is an 8-stage serial shift register. It has a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs QP0 to QP7. The parallel outputs may be connected directly to common bus lines. Data is shifted on p

文件：103.36 Kbytes 页数：17 Pages

恩XP

8-stage shift-and-store register

1. General description The HEF4094B-Q100 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable casca

文件：263.04 Kbytes 页数：15 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司