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HEF4024B

7-stage binary counter

DESCRIPTION The HEF4024B is a 7-stage binary ripple counter with a clock input (CP), and overriding asynchronous master reset input (MR) and seven fully buffered parallel outputs (O0 to O6). The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and force

文件:42.52 Kbytes 页数:5 Pages

PHI

飞利浦

PHI

HEF4024BD

7-stage binary counter

DESCRIPTION The HEF4024B is a 7-stage binary ripple counter with a clock input (CP), and overriding asynchronous master reset input (MR) and seven fully buffered parallel outputs (O0 to O6). The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and force

文件:42.52 Kbytes 页数:5 Pages

PHI

飞利浦

PHI

HEF4024BF

7-stage binary counter

DESCRIPTION The HEF4024B is a 7-stage binary ripple counter with a clock input (CP), and overriding asynchronous master reset input (MR) and seven fully buffered parallel outputs (O0 to O6). The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and force

文件:42.52 Kbytes 页数:5 Pages

PHI

飞利浦

PHI

HEF4024BN

7-stage binary counter

DESCRIPTION The HEF4024B is a 7-stage binary ripple counter with a clock input (CP), and overriding asynchronous master reset input (MR) and seven fully buffered parallel outputs (O0 to O6). The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and force

文件:42.52 Kbytes 页数:5 Pages

PHI

飞利浦

PHI

HEF4024BP

7-stage binary counter

DESCRIPTION The HEF4024B is a 7-stage binary ripple counter with a clock input (CP), and overriding asynchronous master reset input (MR) and seven fully buffered parallel outputs (O0 to O6). The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and force

文件:42.52 Kbytes 页数:5 Pages

PHI

飞利浦

PHI

HEF4024BT

7-stage binary counter

DESCRIPTION The HEF4024B is a 7-stage binary ripple counter with a clock input (CP), and overriding asynchronous master reset input (MR) and seven fully buffered parallel outputs (O0 to O6). The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and force

文件:42.52 Kbytes 页数:5 Pages

PHI

飞利浦

PHI

HEF4024B

7-stage binary counter

恩XP

恩智浦

恩XP

供应商型号品牌批号封装库存备注价格
PHI
23+
SO-14
7000
绝对全新原装!100%保质量特价!请放心订购!
询价
PHI
25+
SOP
2560
绝对原装!现货热卖!
询价
PHI
24+
DIP14
43
询价
恩XP
16+
NA
8800
诚信经营
询价
PHI
25+
SOP14
164
百分百原装正品 真实公司现货库存 本公司只做原装 可
询价
PH
24+
原厂封装
1935
原装现货假一罚十
询价
原厂正品
23+
SO-14
5000
原装正品,假一罚十
询价
N/A
24+/25+
100
原装正品现货库存价优
询价
PHI
25+
TQFP32
18000
原厂直接发货进口原装
询价
恩XP
2016+
DIP14
2500
只做原装,假一罚十,公司可开17%增值税发票!
询价
更多HEF4024B供应商 更新时间2025-10-5 10:51:00