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HEF4020B

14-stage binary counter

DESCRIPTION The HEF4020B is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve fully buffered outputs (O0, O3 to O13). The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and forces a

文件:61 Kbytes 页数:6 Pages

PHI

飞利浦

PHI

HEF4020B

14-stage binary counter

1. General description The HEF4020B is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and 12 buffered parallel outputs (Q0, and Q3 to Q13). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter sta

文件:217.12 Kbytes 页数:11 Pages

NEXPERIA

安世

HEF4020B

14-stage binary counter

文件:109.24 Kbytes 页数:14 Pages

PHI

飞利浦

PHI

HEF4020B

14-stage binary counter

文件:88.41 Kbytes 页数:13 Pages

恩XP

恩XP

HEF4020BD

14-stage binary counter

DESCRIPTION The HEF4020B is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve fully buffered outputs (O0, O3 to O13). The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and forces a

文件:61 Kbytes 页数:6 Pages

PHI

飞利浦

PHI

HEF4020BF

14-stage binary counter

DESCRIPTION The HEF4020B is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve fully buffered outputs (O0, O3 to O13). The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and forces a

文件:61 Kbytes 页数:6 Pages

PHI

飞利浦

PHI

HEF4020BN

14-stage binary counter

DESCRIPTION The HEF4020B is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve fully buffered outputs (O0, O3 to O13). The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and forces a

文件:61 Kbytes 页数:6 Pages

PHI

飞利浦

PHI

HEF4020BP

14-stage binary counter

DESCRIPTION The HEF4020B is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve fully buffered outputs (O0, O3 to O13). The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and forces a

文件:61 Kbytes 页数:6 Pages

PHI

飞利浦

PHI

HEF4020BT

14-stage binary counter

1. General description The HEF4020B is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and 12 buffered parallel outputs (Q0, and Q3 to Q13). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter sta

文件:217.12 Kbytes 页数:11 Pages

NEXPERIA

安世

HEF4020BT

14-stage binary counter

DESCRIPTION The HEF4020B is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve fully buffered outputs (O0, O3 to O13). The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and forces a

文件:61 Kbytes 页数:6 Pages

PHI

飞利浦

PHI

技术参数

  • VCC (V):

    3.0 - 15

  • Output drive capability (mA):

    ± 2.4

  • Logic switching levels:

    CMOS

  • tpd (ns):

    35

  • Power dissipation considerations:

    medium

  • Tamb (°C):

    -40~85

  • Rth(j-a) (K/W):

    56

  • Ψth(j-top) (K/W):

    1.0

  • Rth(j-c) (K/W):

    13

  • Package name:

    SO16

供应商型号品牌批号封装库存备注价格
恩XP
SOP-16
2500
原装长期供货!
询价
PHI
2015+
SOP
19889
一级代理原装现货,特价热卖!
询价
恩XP
24+/25+
5000
原装正品现货库存价优
询价
PHI
25+
SOP16
3200
绝对原装自家现货!真实库存!欢迎来电!
询价
恩XP
16+
NA
8800
诚信经营
询价
PHI
24+
DIP16
92
询价
PH
23+
DIP16
5000
原装正品,假一罚十
询价
PH
24+
原厂封装
888
原装现货假一罚十
询价
PH
25+
DIP-16
18000
原厂直接发货进口原装
询价
恩XP
24+
原厂封装
6540
全新原装
询价
更多HEF4020B供应商 更新时间2025-10-13 16:22:00