Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock)

Description This flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock pulse. Each flip-flop has independent J, K, and preset inputs and Q and Qoutputs. Two flip-flops are controlled by a common clear and a common clock. Preset and clear a

文件：59.68 Kbytes 页数：10 Pages

HITACHIHitachi Semiconductor

日立日立公司

Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock)

Description This flip-flop is edge sensitive to the clock input and changestate on the negative transition of the clock pulse. Each flip-flop has independent J, K, and preset inputs and Q and Q outputs. Two flip-flops are controlled by a common clear and a common clock. Preset and clear are ind

文件：105.89 Kbytes 页数：7 Pages

RENESAS

瑞萨

Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock)

Description\nThis flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock\npulse. Each flip-flop has independent J, K, and preset inputs and Q and Qoutputs. Two flip-flops are\ncontrolled by a common clear and a common clock. Preset and clear are indep •  High Speed Operation: tpd(Clock to Q) = 20 ns typ (CL = 50 pF)\n•  High Output Current: Fanout of 10 LSTTL Loads\n•  Wide Operating Voltage: VCC= 2 to 6 V\n•  Low Input Current: 1 µA max\n•  Low Quiescent Supply Current: ICC(static) = 2 µA max (Ta = 25°C);

HITACHI

日立

Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock)

Description This flip-flop is edge sensitive to the clock input and changestate on the negative transition of the clock pulse. Each flip-flop has independent J, K, and preset inputs and Q and Q outputs. Two flip-flops are controlled by a common clear and a common clock. Preset and clear are ind

文件：105.89 Kbytes 页数：7 Pages

RENESAS

瑞萨

Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock)

Description This flip-flop is edge sensitive to the clock input and changestate on the negative transition of the clock pulse. Each flip-flop has independent J, K, and preset inputs and Q and Q outputs. Two flip-flops are controlled by a common clear and a common clock. Preset and clear are ind

文件：105.89 Kbytes 页数：7 Pages

RENESAS

瑞萨

Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock)

文件：124.65 Kbytes 页数：9 Pages

RENESAS

瑞萨

Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock)

文件：124.65 Kbytes 页数：9 Pages

RENESAS

瑞萨

Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock)

文件：124.65 Kbytes 页数：9 Pages

RENESAS

瑞萨