4-bit Latch/4-to-16-line Decoder

This device presents 4-to-16 line decoder with latched inputs. The HD74HC4515 presents a low level at the selected output. This device consists of four storage latches with common strobe and inhibit (G) inputs. When a low signal is applied to the strobe input, the input data is stored, decoded,

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HITACHIHitachi Semiconductor

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4-bit Latch/4-to-16-line Decoder

HITACHI

日立

HC4514: 4 TO 16 LINE DECODER/LATCH HC4515: 4 TO 16 LINE DECODER LATCH (INV.)

DESCRIPTION The 74HC4514 and the 74HC4515 are high speed CMOS 4-LINE TO 16-LINE DECODERS WITH LATCHED INPUTS fabricated in silicon gate C2MOS technology. They have the same high speed performance of LSTTL combined with true CMOS low power consumption. . HIGH SPEED tPD = 18 ns (TYP.) AT VCC = 5 V

文件：188.93 Kbytes 页数：10 Pages

STMICROELECTRONICS

意法半导体

HC4514: 4 TO 16 LINE DECODER/LATCH HC4515: 4 TO 16 LINE DECODER LATCH INV.

DESCRIPTION The M74HC4514 is an high speed CMOS 4 LINE TO 16 LINE SEGMENT DECODER WITH LATCHED INPUTS fabricated with silicon gate C2MOS technology. ■ HIGH SPEED: tPD= 20 ns (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN

文件：188.93 Kbytes 页数：10 Pages

STMICROELECTRONICS

意法半导体