Octal D-type Transparent Latches (with 3-state outputs)/Octal D-type Transparent Latches (with inverted 3-state outputs)

Description When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of HD74HC533 will follow the inversion of the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again

文件：119.33 Kbytes 页数：10 Pages

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Octal D-type Transparent Latches (with 3-state outputs)

文件：163.47 Kbytes 页数：12 Pages

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Octal D-type Transparent Latches (with 3-state outputs)/Octal D-type Transparent Latches (with inverted 3-state outputs)

Description When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of HD74HC533 will follow the inversion of the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again

文件：119.33 Kbytes 页数：10 Pages

RENESAS

瑞萨

Octal D-type Transparent Latches (with 3-state outputs)

文件：163.47 Kbytes 页数：12 Pages

RENESAS

瑞萨

Octal 3-State Inverting Transparent Latch High-Performance Silicon-Gate CMOS

Octal 3-State Inverting Transparent Latch High-Performance Silicon-Gate CMOS The IN74HC533A is identical in pinout to the LS/ALS533. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. These latches appear transparent t

文件：316.07 Kbytes 页数：7 Pages

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