16-bit Bus Transceivers with 3-state Outputs

Description The HD74ALVCH16245 is designed for asynchronous communication between data buses. The control function implementation minimizes external timing requirements. This device can be used as two 8-bit transceivers or one 16-bit transceiver. Features • VCC = 2.3 V to 3.6 V • Typical

文件：47.5 Kbytes 页数：9 Pages

HITACHIHitachi Semiconductor

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6-bit Bus Transceivers with 3-state Outputs

Description The HD74ALVCH16245 is designed for asynchronous communication between data buses. The control function implementation minimizes external timing requirements. This device can be used as two 8-bit transceivers or one 16-bit transceiver. Features • VCC = 2.3 V to 3.6 V • Typical

文件：123.66 Kbytes 页数：9 Pages

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18-bit Universal Bus Transceivers with 3-state Outputs

Description Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A to B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held a

文件：56.86 Kbytes 页数：13 Pages

HITACHIHitachi Semiconductor

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18-bit Universal Bus Transceivers with 3-state Outputs

Description Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A to B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held a

文件：53.9 Kbytes 页数：13 Pages

HITACHIHitachi Semiconductor

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18-bit Universal Bus Transceivers with 3-state Outputs

Description Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A to B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held a

文件：3.36117 Mbytes 页数：13 Pages

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16-bit Registered Transceivers with 3-state Outputs

Description The HD74ALVCH162543 can be used as two 8-bit transceivers or one 16-bit transceiver. Features • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±12 mA (@VCC = 3.0 V

文件：58.97 Kbytes 页数：12 Pages

HITACHIHitachi Semiconductor

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12-bit to 24-bit Multiplexed D-type Latches with 3-state Outputs

Description The HD74ALVCH16260 is a 12-bit to 24-bit multiplexed D-type latch used in applications where two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical applications include multiplexing and / or demultiplexing of address and data information i

文件：57.62 Kbytes 页数：12 Pages

HITACHIHitachi Semiconductor

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12-bit to 24-bit Registered Bus Transceivers with 3-state Outputs

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文件：66.43 Kbytes 页数：13 Pages

HITACHIHitachi Semiconductor

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12-bit to 24-bit Registered Bus Exchanger with 3-state Outputs

Description The HD74ALVCH16270 is used in applications where data must be transferred from a narrow high speed bus to a wide lower frequency bus. The device provides synchronous data exchange between the two ports. Features • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce

文件：67.11 Kbytes 页数：13 Pages

HITACHIHitachi Semiconductor

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3.3-V 20-bit Flip Flops with 3-state Outputs

Description The HD74ALVCH162721’s twenty flip flops are edge triggered D-type flip flops with qualified clock storage. Features • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output curren

文件：52.33 Kbytes 页数：12 Pages

HITACHIHitachi Semiconductor

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