18-bit Universal Bus Drivers with 3-state Outputs

Description Data flow from A to Y is controlled by the output enable (OE). The device operates in the transparent mode when LE is high. The A data is latched if CLK is held at a high or low logic level. If LE is low, the A bus data is stored in the latch flip flop on the low to high transition of

文件：53.1 Kbytes 页数：13 Pages

HITACHIHitachi Semiconductor

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20-bit Universal Bus Driver with 3-state Outputs

Description This 20-bit universal bus driver is designed for 2.3 V to 3.6 V VCC operation. Features • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±12 mA (@VCC = 3.0 V) • B

文件：57.24 Kbytes 页数：13 Pages

HITACHIHitachi Semiconductor

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16-bit Universal Bus Driver with 3-state Outputs

Description This HD74ALVCH16334 is a 16-bit universal bus driver is designed for 2.3 V to 3.6 V VCC operation. Features • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±24 mA

文件：56.12 Kbytes 页数：13 Pages

HITACHIHitachi Semiconductor

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16-bit Transparent D-type Latches with 3-state Outputs

Description The HD74ALVCH16373 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. Features • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce 2.0 V (@VCC = 3.3 V,

文件：48.08 Kbytes 页数：11 Pages

HITACHIHitachi Semiconductor

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16-bit D-type Flip Flops with 3-state Outputs

Description The HD74ALVCH16374 has sixteen edge trigger D type flip flops with three state outputs in a 48 pin package. Features • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output curre

文件：50.38 Kbytes 页数：10 Pages

HITACHIHitachi Semiconductor

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16-bit D-type Flip Flops with 3-state Outputs

Description The HD74ALVCH16374 has sixteen edge trigger D type flip flops with three state outputs in a 48 pin package. Features • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output curre

文件：78.94 Kbytes 页数：9 Pages

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18-bit Universal Bus Transceivers with 3-state Outputs

Description Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A to B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held a

文件：55.42 Kbytes 页数：13 Pages

HITACHIHitachi Semiconductor

日立日立公司

18-bit Universal Bus Transceivers with 3-state Outputs

Description Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A to B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held a

文件：52.52 Kbytes 页数：13 Pages

HITACHIHitachi Semiconductor

日立日立公司

18-bit Universal Bus Transceivers with 3-state Outputs

Description Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A to B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held a

文件：241.9 Kbytes 页数：12 Pages

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瑞萨

16-bit Registered Transceivers with 3-state Outputs

Description The HD74ALVCH16543 can be used as two 8-bit transceivers or one 16-bit transceiver. Features • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±24 mA (@VCC = 3.0 V)

文件：57.44 Kbytes 页数：13 Pages

HITACHIHitachi Semiconductor

日立日立公司