SYNCHRONOUS PROGRAMMABLE 4-BIT COUNTERS

文件：310.5 Kbytes 页数：15 Pages

STMICROELECTRONICS

意法半导体

4-bit synchronous binary counter with asynchronous reset

DESCRIPTION The HEF40161B is a fully synchronous edge-triggered 4-bit binary counter with a clock input (CP), an overriding asynchronous master reset (MR), four parallel data inputs (P0 to P3), three synchronous mode control inputs (parallel enable (PE), count enable parallel (CEP) and count enab

文件：152.52 Kbytes 页数：10 Pages

PHI

飞利浦

4-bit synchronous binary counter with asynchronous reset

DESCRIPTION The HEF40161B is a fully synchronous edge-triggered 4-bit binary counter with a clock input (CP), an overriding asynchronous master reset (MR), four parallel data inputs (P0 to P3), three synchronous mode control inputs (parallel enable (PE), count enable parallel (CEP) and count enab

文件：152.52 Kbytes 页数：10 Pages

PHI

飞利浦

4-bit synchronous binary counter with asynchronous reset

DESCRIPTION The HEF40161B is a fully synchronous edge-triggered 4-bit binary counter with a clock input (CP), an overriding asynchronous master reset (MR), four parallel data inputs (P0 to P3), three synchronous mode control inputs (parallel enable (PE), count enable parallel (CEP) and count enab

文件：152.52 Kbytes 页数：10 Pages

PHI

飞利浦