DUAL-J-K MASTER-SLAVE FLIP-FLOP

DESCRIPTION The HCC4027B (extended temperature range) and HCF4027B (intermediate temperature range) are monolithic integrated circuit, available in 16-lead dual in-line plastic or ceramic package and plastic micro package. ■ SET-RESET CAPABILITY ■ STATIC FLIP-FLOP OPERATION - RETAINS

文件：286.35 Kbytes 页数：12 Pages

STMICROELECTRONICS

意法半导体

DUAL J-K MASTER SLAVE FLIP-FLOP

文件：218.67 Kbytes 页数：9 Pages

STMICROELECTRONICS

意法半导体

Package：16-DIP（0.300"，7.62mm）；包装：卷带（TR） 功能：设置（预设）和复位 类别：集成电路（IC） 触发器 描述：IC FF JK TYPE DUAL 1BIT 16DIP

STMICROELECTRONICS

意法半导体

Dual JK flip-flop

DESCRIPTION The HEF4027B is a dual JK flip-flop which is edge-triggered and features independent set direct (SD), clear direct (CD), clock (CP) inputs and outputs (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH as

文件：64.709 Kbytes 页数：5 Pages

PHI

飞利浦

Dual JK flip-flop

DESCRIPTION The HEF4027B is a dual JK flip-flop which is edge-triggered and features independent set direct (SD), clear direct (CD), clock (CP) inputs and outputs (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH as

文件：64.709 Kbytes 页数：5 Pages

PHI

飞利浦

Dual JK flip-flop

DESCRIPTION The HEF4027B is a dual JK flip-flop which is edge-triggered and features independent set direct (SD), clear direct (CD), clock (CP) inputs and outputs (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH as

文件：64.709 Kbytes 页数：5 Pages

PHI

飞利浦