| 型号 | 下载 订购 | 功能描述 | 制造商 上传企业 | LOGO |
|---|---|---|---|---|
GAL22V10D | GAL 22V10 Device Datasheet Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les 文件:718.73 Kbytes 页数:23 Pages | Lattice 莱迪思 | Lattice | |
High Performance E2CMOS PLD Generic Array Logic Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les 文件:386.45 Kbytes 页数:29 Pages | Lattice 莱迪思 | Lattice | ||
GAL 22V10 Device Datasheet Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les 文件:718.73 Kbytes 页数:23 Pages | Lattice 莱迪思 | Lattice | ||
Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet. Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l 文件:718.73 Kbytes 页数:23 Pages | Lattice 莱迪思 | Lattice | ||
GAL 22V10 Device Datasheet Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les 文件:718.73 Kbytes 页数:23 Pages | Lattice 莱迪思 | Lattice | ||
High Performance E2CMOS PLD Generic Array Logic Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les 文件:386.45 Kbytes 页数:29 Pages | Lattice 莱迪思 | Lattice | ||
Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet. Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l 文件:718.73 Kbytes 页数:23 Pages | Lattice 莱迪思 | Lattice | ||
Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet. Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l 文件:718.73 Kbytes 页数:23 Pages | Lattice 莱迪思 | Lattice | ||
GAL 22V10 Device Datasheet Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les 文件:718.73 Kbytes 页数:23 Pages | Lattice 莱迪思 | Lattice | ||
Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet. Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l 文件:718.73 Kbytes 页数:23 Pages | Lattice 莱迪思 | Lattice |
技术参数
- 延迟时间 tpd(1)最大值:
10ns
- 电源电压 - 内部:
4.5 V ~ 5.5 V
- 宏单元数:
10
- 工作温度:
-40°C ~ 85°C(TA)
- 安装类型:
表面贴装
- 封装/外壳:
28-LCC(J 形引线)
- 供应商器件封装:
28-PLCC(11.51x11.51)
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
Lattice(莱迪斯) |
24+ |
标准封装 |
11848 |
原厂渠道供应,大量现货,原型号开票。 |
询价 | ||
LATTICE |
22+ |
PLCC |
2000 |
进口原装!现货库存 |
询价 | ||
LATTICE |
新 |
2 |
全新原装 货期两周 |
询价 | |||
LATTICE |
18+ |
DIP24 |
85600 |
保证进口原装可开17%增值税发票 |
询价 | ||
LAT |
23+ |
65480 |
询价 | ||||
20+ |
36800 |
原装优势主营型号-可开原型号增税票 |
询价 | ||||
Lattice(莱迪斯) |
2021/2022+ |
标准封装 |
3500 |
原厂原装现货订货价格优势终端BOM表可配单提供样品 |
询价 | ||
LATTICE |
25+ |
PLCC |
3200 |
全新原装、诚信经营、公司现货销售 |
询价 | ||
LATTICE/莱迪斯 |
23+ |
DIP |
10000 |
原厂授权一级代理,专业海外优势订货,价格优势、品种 |
询价 | ||
23+ |
27240 |
##公司主营品牌长期供应100%原装现货可含税提供技术 |
询价 |
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