5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DCBalanced) Converter

1FEATURES 2• 5 MHz–43 MHz Embedded Clock & DCBalanced Data Transmission (21 Total LVDS Data Bits Plus 3 Low Speed LVCMOS Data Bits) • User Adjustable Pre-Emphasis Driving Ability Through External Resistor on LVDS Outputs and Capable to Drive up to 10 Meters Shielded Twisted-Pair Cable • S

文件：419.69 Kbytes 页数：26 Pages

TI

德州仪器

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to Single Embedded Clock DC-Balanced LVDS Converter

文件：1.01342 Mbytes 页数：18 Pages

NSC

国半

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DC Balanced) Converter

文件：867.7 Kbytes 页数：26 Pages

TI

德州仪器

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DC DCBalanced)

文件：865.03 Kbytes 页数：27 Pages

TI

德州仪器

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to Single Embedded Clock DC-Balanced LVDS Converter

文件：1.01592 Mbytes 页数：18 Pages

NSC

国半

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DC DCBalanced)

TI

德州仪器

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DCBalanced) Converter

1FEATURES 2• 5 MHz–43 MHz Embedded Clock & DCBalanced Data Transmission (21 Total LVDS Data Bits Plus 3 Low Speed LVCMOS Data Bits) • User Adjustable Pre-Emphasis Driving Ability Through External Resistor on LVDS Outputs and Capable to Drive up to 10 Meters Shielded Twisted-Pair Cable • S

文件：419.69 Kbytes 页数：26 Pages

TI

德州仪器

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DCBalanced) Converter

1FEATURES 2• 5 MHz–43 MHz Embedded Clock & DCBalanced Data Transmission (21 Total LVDS Data Bits Plus 3 Low Speed LVCMOS Data Bits) • User Adjustable Pre-Emphasis Driving Ability Through External Resistor on LVDS Outputs and Capable to Drive up to 10 Meters Shielded Twisted-Pair Cable • S

文件：419.69 Kbytes 页数：26 Pages

TI

德州仪器

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DCBalanced) Converter

1FEATURES 2• 5 MHz–43 MHz Embedded Clock & DCBalanced Data Transmission (21 Total LVDS Data Bits Plus 3 Low Speed LVCMOS Data Bits) • User Adjustable Pre-Emphasis Driving Ability Through External Resistor on LVDS Outputs and Capable to Drive up to 10 Meters Shielded Twisted-Pair Cable • S

文件：419.69 Kbytes 页数：26 Pages

TI

德州仪器

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DCBalanced) Converter

1FEATURES 2• 5 MHz–43 MHz Embedded Clock & DCBalanced Data Transmission (21 Total LVDS Data Bits Plus 3 Low Speed LVCMOS Data Bits) • User Adjustable Pre-Emphasis Driving Ability Through External Resistor on LVDS Outputs and Capable to Drive up to 10 Meters Shielded Twisted-Pair Cable • S

文件：419.69 Kbytes 页数：26 Pages

TI

德州仪器