DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis

1FEATURES 2• DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation • Four Levels of Transmit Pre-Emphasis Drive Lossy Backplanes and Cables • On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space

文件：502.92 Kbytes 页数：18 Pages

TI

德州仪器

DS25BR100 / DS25BR101 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

1FEATURES 2• DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation • Receive Equalization Reduces ISI Jitter Due to Media Loss • Transmit Pre-Emphasis Drives Lossy Backplanes and Cables • On-Chip 100Ω Input and Output Termination: – Minimizes Insertion and Return Losses – R

文件：531.49 Kbytes 页数：21 Pages

TI

德州仪器

DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis

文件：845.57 Kbytes 页数：16 Pages

TI

德州仪器

3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis

文件：406.47 Kbytes 页数：14 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis

文件：404.86 Kbytes 页数：14 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

具有发送预加重功能的 3.125Gbps LVDS 缓冲器

The DS25BR120 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced metallic cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity.The DS25BR120 features four leve • DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation\n• Four Levels of Transmit Pre-Emphasis Drive Lossy Backplanes and Cables\n• On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space \n• 7 kV ESD on LVDS;

TI

德州仪器

丝印：2R120；Package：WSON；DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis

1FEATURES 2• DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation • Four Levels of Transmit Pre-Emphasis Drive Lossy Backplanes and Cables • On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space

文件：502.92 Kbytes 页数：18 Pages

TI

德州仪器

丝印：2R120；Package：WSON；DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis

1FEATURES 2• DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation • Four Levels of Transmit Pre-Emphasis Drive Lossy Backplanes and Cables • On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space

文件：502.92 Kbytes 页数：18 Pages

TI

德州仪器

丝印：2R120；Package：WSON；DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis

1FEATURES 2• DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation • Four Levels of Transmit Pre-Emphasis Drive Lossy Backplanes and Cables • On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space

文件：502.92 Kbytes 页数：18 Pages

TI

德州仪器

丝印：2R120；Package：WSON；DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis

1FEATURES 2• DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation • Four Levels of Transmit Pre-Emphasis Drive Lossy Backplanes and Cables • On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space

文件：502.92 Kbytes 页数：18 Pages

TI

德州仪器