DS25BR120TSDSLASHNOPB.A中文资料德州仪器数据手册PDF规格书

1FEATURES

2• DC - 3.125 Gbps Low Jitter, High Noise

Immunity, Low Power Operation

• Four Levels of Transmit Pre-Emphasis Drive

Lossy Backplanes and Cables

• On-Chip 100Ω Input and Output Termination

Minimizes Insertion and Return Losses,

Reduces Component Count, and Minimizes

Board Space

• 7 kV ESD on LVDS I/O pins Protects Adjoining

Components

• Small 3 mm x 3 mm 8-WSON Space Saving

Package

APPLICATIONS

• Clock and Data Buffering

• Metallic Cable Driving

• FR-4 Driving

DESCRIPTION

The DS25BR120 is a single channel 3.125 Gbps

LVDS buffer optimized for high-speed signal

transmission over lossy FR-4 printed circuit board

backplanes and balanced metallic cables. Fully

differential signal paths ensure exceptional signal

integrity and noise immunity.

The DS25BR120 features four levels of pre-emphasis

(PE) for use as an optimized driver device. Other

LVDS devices with similar IO characteristics include

the following products. The DS25BR110 features four

levels of equalization for use as an optimized receiver

device, while the DS25BR100 features both pre- emphasis and equalization for use as an optimized

repeater device. The DS25BR150 is a buffer/repeater

with the lowest power consumption and does not

feature transmit pre-emphasis nor receive

equalization.

Wide input common mode range allows the receiver

to accept signals with LVDS, CML and LVPECL

levels; the output levels are LVDS. A very small

package footprint requires minimal space on the

board while the flow-through pinout allows easy board

layout. The differential inputs and outputs are

internally terminated with a 100Ω resistor to lower

device input and output return losses, reduce

component count and further minimize board space.