丝印：D51；Package：USON；12-Bit, Ultra-Low Glitch, Voltage Output DIGITAL-TO-ANALOG CONVERTER

FEATURES · Relative Accuracy (INL): ±0.35LSB · Ultra-Low Glitch Energy: 0.1nV-s · Low Power Operation: 100mA at 2.7V · Power-On Reset to Zero Scale · Power Supply: 2.7V to 5.5V Single Supply · Power-Down: 0.05mA at 2.7V · 12-Bit Linearity and Monotonicity · Rail-to-Rail Voltage Output · S

文件：789.9 Kbytes 页数：22 Pages

TI

德州仪器

丝印：D51；Package：USON；12-Bit, Ultra-Low Glitch, Voltage Output DIGITAL-TO-ANALOG CONVERTER

FEATURES · Relative Accuracy (INL): ±0.35LSB · Ultra-Low Glitch Energy: 0.1nV-s · Low Power Operation: 100mA at 2.7V · Power-On Reset to Zero Scale · Power Supply: 2.7V to 5.5V Single Supply · Power-Down: 0.05mA at 2.7V · 12-Bit Linearity and Monotonicity · Rail-to-Rail Voltage Output · S

文件：789.9 Kbytes 页数：22 Pages

TI

德州仪器

8G bits DDR4 SDRAM

• Features • Double-data-rate architecture: two data transfers per clock cycle. • The high-speed data transfer is realized by the 8 bits prefetch pipelined architecture. • Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver

文件：1.6526 Mbytes 页数：41 Pages

KINGSTON

金士顿

8G bits DDR4 SDRAM

• Features • Double-data-rate architecture: two data transfers per clock cycle. • The high-speed data transfer is realized by the 8 bits prefetch pipelined architecture. • Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver

文件：1.6526 Mbytes 页数：41 Pages

KINGSTON

金士顿

Kingston DDR4 DRAM for embedded applications

Kingston on-board DDR4 DRAM is designed to meet the needs of embedded applications and offers a high speed option with lower power consumption. KEY FEATURES • Double-data-rate architecture: two data transfers per clock cycle • The high-speed data transfer is realized by the 8 bits prefetch p

文件：4.1171 Mbytes 页数：2 Pages

KINGSTON

金士顿

8G bits DDR4 SDRAM

• Features • Double-data-rate architecture: two data transfers per clock cycle. • The high-speed data transfer is realized by the 8 bits prefetch pipelined architecture. • Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver

文件：1.6526 Mbytes 页数：41 Pages

KINGSTON

金士顿

Kingston DDR4 DRAM for embedded applications

Kingston on-board DDR4 DRAM is designed to meet the needs of embedded applications and offers a high speed option with lower power consumption. KEY FEATURES • Double-data-rate architecture: two data transfers per clock cycle • The high-speed data transfer is realized by the 8 bits prefetch p

文件：4.1171 Mbytes 页数：2 Pages

KINGSTON

金士顿

8G bits DDR4 SDRAM

• Features • Double-data-rate architecture: two data transfers per clock cycle. • The high-speed data transfer is realized by the 8 bits prefetch pipelined architecture. • Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver

文件：1.6526 Mbytes 页数：41 Pages

KINGSTON

金士顿

8G bits DDR4 SDRAM

• Features • Double-data-rate architecture: two data transfers per clock cycle. • The high-speed data transfer is realized by the 8 bits prefetch pipelined architecture. • Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver

文件：1.6526 Mbytes 页数：41 Pages

KINGSTON

金士顿

8G bits DDR4 SDRAM

• Features • Double-data-rate architecture: two data transfers per clock cycle. • The high-speed data transfer is realized by the 8 bits prefetch pipelined architecture. • Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver

文件：1.6526 Mbytes 页数：41 Pages

KINGSTON

金士顿