D51

Telephone Message & Circuit Noise Measurement

D5116AN9CPGRKI-U

8G bits DDR4 SDRAM

•Features •Double-data-ratearchitecture:twodatatransfersperclockcycle. •Thehigh-speeddatatransferisrealizedbythe8bitsprefetchpipelinedarchitecture. •Bi-directionaldifferentialdatastrobe(DQSand/DQS)istransmitted/receivedwithdataforcapturingdataatthereceiver

D5116AN9CPGXNI-U

8G bits DDR4 SDRAM

•Features •Double-data-ratearchitecture:twodatatransfersperclockcycle. •Thehigh-speeddatatransferisrealizedbythe8bitsprefetchpipelinedarchitecture. •Bi-directionaldifferentialdatastrobe(DQSand/DQS)istransmitted/receivedwithdataforcapturingdataatthereceiver

D5116AN9CXGRK

Kingston DDR4 DRAM for embedded applications

Kingstonon-boardDDR4DRAMisdesignedtomeettheneedsofembedded applicationsandoffersahighspeedoptionwithlowerpowerconsumption. KEYFEATURES •Double-data-ratearchitecture:twodatatransfersperclockcycle •Thehigh-speeddatatransferisrealizedbythe8bitsprefetchp

D5116AN9CXGRKI-U

8G bits DDR4 SDRAM

•Features •Double-data-ratearchitecture:twodatatransfersperclockcycle. •Thehigh-speeddatatransferisrealizedbythe8bitsprefetchpipelinedarchitecture. •Bi-directionaldifferentialdatastrobe(DQSand/DQS)istransmitted/receivedwithdataforcapturingdataatthereceiver

D5116AN9CXGRK-U

Kingston DDR4 DRAM for embedded applications

Kingstonon-boardDDR4DRAMisdesignedtomeettheneedsofembedded applicationsandoffersahighspeedoptionwithlowerpowerconsumption. KEYFEATURES •Double-data-ratearchitecture:twodatatransfersperclockcycle •Thehigh-speeddatatransferisrealizedbythe8bitsprefetchp

D5116AN9CXGRK-U

8G bits DDR4 SDRAM

•Features •Double-data-ratearchitecture:twodatatransfersperclockcycle. •Thehigh-speeddatatransferisrealizedbythe8bitsprefetchpipelinedarchitecture. •Bi-directionaldifferentialdatastrobe(DQSand/DQS)istransmitted/receivedwithdataforcapturingdataatthereceiver

D5116AN9CXGXNI-U

8G bits DDR4 SDRAM

•Features •Double-data-ratearchitecture:twodatatransfersperclockcycle. •Thehigh-speeddatatransferisrealizedbythe8bitsprefetchpipelinedarchitecture. •Bi-directionaldifferentialdatastrobe(DQSand/DQS)istransmitted/receivedwithdataforcapturingdataatthereceiver

D5116AN9CXGXN-U

8G bits DDR4 SDRAM

•Features •Double-data-ratearchitecture:twodatatransfersperclockcycle. •Thehigh-speeddatatransferisrealizedbythe8bitsprefetchpipelinedarchitecture. •Bi-directionaldifferentialdatastrobe(DQSand/DQS)istransmitted/receivedwithdataforcapturingdataatthereceiver

D5128ECMDPGJD

Kingston DDR3/3L DRAM for embedded applications

KEYFEATURES •DoubleDataRate(DDR)architecture:twodatatransfersperclockcycle •High-speeddatatransferisrealizedby8bitsprefetchpipelinedarchitecture •Bi-directionaldifferentialdatastrobe(DOSand/DQS)istransmitted/received withdataforcapturingdataatthereceiver