| 零件编号 | 下载&订购 | 功能描述 | 制造商&上传企业 | LOGO |
|---|---|---|---|---|
CY7C1352 | 256K x18 Pipelined SRAM with NoBL Architecture FunctionalDescription TheCY7C1352isa3.3V256Kby18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352isequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequiredtoe | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | |
256K x18 Pipelined SRAM with NoBL Architecture FunctionalDescription TheCY7C1352isa3.3V256Kby18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352isequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequiredtoe | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
256K x18 Pipelined SRAM with NoBL Architecture FunctionalDescription TheCY7C1352isa3.3V256Kby18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352isequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequiredtoe | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
256K x18 Pipelined SRAM with NoBL Architecture FunctionalDescription TheCY7C1352isa3.3V256Kby18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352isequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequiredtoe | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
256K x18 Pipelined SRAM with NoBL Architecture FunctionalDescription TheCY7C1352isa3.3V256Kby18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352isequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequiredtoe | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
256K x 18 Pipilined SRAm with NoBL Architecture FunctionalDescription TheCY7C1352Bisa3.3V256Kby18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352BisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequiredto | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
256K x 18 Pipilined SRAm with NoBL Architecture FunctionalDescription TheCY7C1352Bisa3.3V256Kby18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352BisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequiredto | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
256K x 18 Pipilined SRAm with NoBL Architecture FunctionalDescription TheCY7C1352Bisa3.3V256Kby18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352BisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequiredto | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
256K x 18 Pipilined SRAm with NoBL Architecture FunctionalDescription TheCY7C1352Bisa3.3V256Kby18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352BisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequiredto | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
256K x 18 Pipilined SRAm with NoBL Architecture FunctionalDescription TheCY7C1352Bisa3.3V256Kby18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352BisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequiredto | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
256K x 18 Pipilined SRAm with NoBL Architecture FunctionalDescription TheCY7C1352Bisa3.3V256Kby18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352BisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequiredto | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
256K x 18 Pipilined SRAm with NoBL Architecture FunctionalDescription TheCY7C1352Bisa3.3V256Kby18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352BisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequiredto | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture FunctionalDescription[1] TheCY7C1352Fisa3.3V,256Kx18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352FisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequired | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture FunctionalDescription[1] TheCY7C1352Fisa3.3V,256Kx18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352FisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequired | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture FunctionalDescription[1] TheCY7C1352Fisa3.3V,256Kx18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352FisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequired | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture FunctionalDescription[1] TheCY7C1352Fisa3.3V,256Kx18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352FisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequired | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture FunctionalDescription[1] TheCY7C1352Fisa3.3V,256Kx18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352FisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequired | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture FunctionalDescription[1] TheCY7C1352Fisa3.3V,256Kx18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352FisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequired | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture FunctionalDescription[1] TheCY7C1352Fisa3.3V,256Kx18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352FisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequired | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture FunctionalDescription[1] TheCY7C1352Fisa3.3V,256Kx18synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1352FisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequired | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress |
详细参数
- 型号：
CY7C1352
- 制造商：
Cypress Semiconductor
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
CY |
22+ |
QFP |
4860 |
品牌专业分销商,可以零售 |
询价 | ||
CY |
22+ |
QFP |
6980 |
原装现货,可开13%税票 |
询价 | ||
CY |
23+ |
DIP-16 |
18000 |
询价 | |||
CYPRESS |
23+ |
PLCC |
9526 |
询价 | |||
Cypress |
100-TQFP |
1800 |
Cypress一级分销,原装原盒原包装! |
询价 | |||
CYP |
1999 |
16 |
原装正品现货供应 |
询价 | |||
CY |
1436+ |
QFP |
30000 |
绝对原装进口现货可开增值税发票 |
询价 | ||
CY |
QFP100 |
98+ |
18 |
全新原装进口自己库存优势 |
询价 | ||
CYPRESS |
1635+ |
TQFP1420-100 |
6000 |
好渠道!好价格!一片起卖! |
询价 | ||
CYPRESS |
05+ |
原厂原装 |
4376 |
只做全新原装真实现货供应 |
询价 |
相关规格书
更多- CY7C1352G-133AXC
- CY7C1353G-100AXC
- CY7C1354C-166AXC
- CY7C1354C-200AXC
- CY7C1354CV25-166AXC
- CY7C1354CV25-200AXC
- CY7C1355C-133AXC
- CY7C1356C-166AXI
- CY7C1356CV25-166AXC
- CY7C1357C-133AXC
- CY7C1360A-150BGC
- CY7C1360C-166AXI
- CY7C1360C-200AJXC
- CY7C1360S-166AXC
- CY7C1360S-200AXI
- CY7C1361C-100AXE
- CY7C1361C-133AJXC
- CY7C1361C-133AXI
- CY7C1363C-133AJXC
- CY7C1363D-133AXI
- CY7C1364CV33-166AXC
- CY7C1365CV33-133AXC
- CY7C1367C-166AXC
- CY7C136AE-55NXI
- CY7C136E-25JXI
- CY7C136E-55JXC
- CY7C1370BV25-167AC
- CY7C1370D-167BZXC
- CY7C1370D-200AXI
- CY7C1370D-250AXC
- CY7C1370DV25-167AXC
- CY7C1370DV25-200BZC
- CY7C1370SV25-200AXC
- CY7C1371D-100AXI
- CY7C1371D-133BGC
- CY7C1371DV33-133BZI
- CY7C1372D-167AXC
- CY7C1372D-200AXC
- CY7C1373D-100AXC
- CY7C1380D-167AXC
- CY7C1380D-167BZC
- CY7C1380D-250AXC
- CY7C1380DV33-200BZI
- CY7C1381D-100BZI
- CY7C1381D-133AXC
相关库存
更多- CY7C1352S-133AXC
- CY7C1353S-100AXC
- CY7C1354C-166AXI
- CY7C1354C-200AXI
- CY7C1354CV25-166BZC
- CY7C1355B-100AC
- CY7C1356C-166AXC
- CY7C1356C-250AXC
- CY7C1357C-100BZC
- CY7C1357S-100AXC
- CY7C1360C-166AXC
- CY7C1360C-166BZC
- CY7C1360C-200AXC
- CY7C1360S-166BZXI
- CY7C1361C-100AXC
- CY7C1361C-100BGC
- CY7C1361C-133AXC
- CY7C1362C-166AJXC
- CY7C1363C-133AXC
- CY7C1364C-166BZI
- CY7C1365C-133BZI
- CY7C1366C-166AXC
- CY7C136AE-55JXI
- CY7C136E-25JXC
- CY7C136E-25NXC
- CY7C136E-55NXC
- CY7C1370D-167AXC
- CY7C1370D-200AXC
- CY7C1370D-200BZI
- CY7C1370D-250AXI
- CY7C1370DV25-200AXC
- CY7C1370DV25-250AXC
- CY7C1371D-100AXC
- CY7C1371D-133AXC
- CY7C1371DV33-133AXI
- CY7C1371S-133AXC
- CY7C1372D-167AXI
- CY7C1372DV25-167AXC
- CY7C1373D-133AXI
- CY7C1380D-167AXI
- CY7C1380D-200AXC
- CY7C1380DV33-200AXI
- CY7C1381D-100AXC
- CY7C1381D-100BZXI
- CY7C1381D-133AXI
