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CY7C1351G

4-Mbit (128K x 36) Flow-through SRAM with NoBL??Architecture

Functional Description[1] The CY7C1351G is a 3.3V, 128K x 36 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1351G is equipped with the advanced No Bus Latency™ (NoBL™) logic requi

文件:397.88 Kbytes 页数:14 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1351G-100AXC

4-Mbit (128K x 36) Flow-through SRAM with NoBL??Architecture

Functional Description[1] The CY7C1351G is a 3.3V, 128K x 36 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1351G is equipped with the advanced No Bus Latency™ (NoBL™) logic requi

文件:397.88 Kbytes 页数:14 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1351G-100AXI

4-Mbit (128K x 36) Flow-through SRAM with NoBL??Architecture

Functional Description[1] The CY7C1351G is a 3.3V, 128K x 36 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1351G is equipped with the advanced No Bus Latency™ (NoBL™) logic requi

文件:397.88 Kbytes 页数:14 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1351G-100BGC

4-Mbit (128K x 36) Flow-through SRAM with NoBL??Architecture

Functional Description[1] The CY7C1351G is a 3.3V, 128K x 36 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1351G is equipped with the advanced No Bus Latency™ (NoBL™) logic requi

文件:397.88 Kbytes 页数:14 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1351G-100BGI

4-Mbit (128K x 36) Flow-through SRAM with NoBL??Architecture

Functional Description[1] The CY7C1351G is a 3.3V, 128K x 36 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1351G is equipped with the advanced No Bus Latency™ (NoBL™) logic requi

文件:397.88 Kbytes 页数:14 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1351G-100BGXC

4-Mbit (128K x 36) Flow-through SRAM with NoBL??Architecture

Functional Description[1] The CY7C1351G is a 3.3V, 128K x 36 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1351G is equipped with the advanced No Bus Latency™ (NoBL™) logic requi

文件:397.88 Kbytes 页数:14 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1351G-100BGXI

4-Mbit (128K x 36) Flow-through SRAM with NoBL??Architecture

Functional Description[1] The CY7C1351G is a 3.3V, 128K x 36 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1351G is equipped with the advanced No Bus Latency™ (NoBL™) logic requi

文件:397.88 Kbytes 页数:14 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1351G-133AXC

4-Mbit (128K x 36) Flow-through SRAM with NoBL??Architecture

Functional Description[1] The CY7C1351G is a 3.3V, 128K x 36 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1351G is equipped with the advanced No Bus Latency™ (NoBL™) logic requi

文件:397.88 Kbytes 页数:14 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1351G-133AXI

4-Mbit (128K x 36) Flow-through SRAM with NoBL??Architecture

Functional Description[1] The CY7C1351G is a 3.3V, 128K x 36 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1351G is equipped with the advanced No Bus Latency™ (NoBL™) logic requi

文件:397.88 Kbytes 页数:14 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1351G-133BGC

4-Mbit (128K x 36) Flow-through SRAM with NoBL??Architecture

Functional Description[1] The CY7C1351G is a 3.3V, 128K x 36 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1351G is equipped with the advanced No Bus Latency™ (NoBL™) logic requi

文件:397.88 Kbytes 页数:14 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

技术参数

  • 合格汽车:

  • 密度 (Kb):

    4096

  • Density (Mb):

    4

  • 频率 (MHz):

    100

  • 最高工作温度 (°C):

    70

  • Max. Operating VCCQ (V):

    3.60

  • 最高工作电压 (V):

    3.63

  • 最低工作温度 (°C):

    0

  • Min. Operating VCCQ (V):

    2.40

  • 最低工作电压 (V):

    3.14

  • 组织 (X x Y):

    128Kb x 36

  • Part Family:

    NoBL

  • Tape & Reel:

  • 温度分类:

    商用

供应商型号品牌批号封装库存备注价格
CYPRESS
22+
2097
原装现货
询价
CYPRESS
23+
2097
专注配单,只做原装进口现货
询价
CYPRESS
23+
7000
询价
Cypress
TQFP
4500
Cypress一级分销,原装原盒原包装!
询价
CYRESS
24+
TQFP
6980
原装现货,可开13%税票
询价
CYPRESSSEMICONDUCTORSWIT
24+
459
询价
CYPRESS
25+
3-SOT23B
4500
百分百原装正品 真实公司现货库存 本公司只做原装 可
询价
CYPRESS
23+
QFP
8650
受权代理!全新原装现货特价热卖!
询价
CYPRESS
三年内
1983
只做原装正品
询价
Cypress
23+
100-TQFP
65600
询价
更多CY7C1351G供应商 更新时间2025-12-23 14:00:00