10-BIT LATCHES WITH 3-STATE OUTPUTS

Function, Pinout, and Drive Compatible With FCT, F, and AM29841 Logic Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics Ioff Supports Partial-Power-Down Mode Operation Matched Rise and Fall Tim

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10-BIT LATCHES WITH 3-STATE OUTPUTS

文件：316.65 Kbytes 页数：12 Pages

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10-Bit Latch

文件：84.15 Kbytes 页数：8 Pages

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德州仪器

10-BIT LATCHES WITH 3-STATE OUTPUTS

文件：316.65 Kbytes 页数：12 Pages

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德州仪器

10-Bit Latch

文件：84.15 Kbytes 页数：8 Pages

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德州仪器

10-Bit Latch

文件：84.15 Kbytes 页数：8 Pages

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德州仪器

10-Bit Latch

文件：84.15 Kbytes 页数：8 Pages

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德州仪器

具有三态输出的 10 位总线接口 D 类锁存器

The \\x92FCT841T bus-interface latches are designed to eliminate additional packages required to buffer existing latches and provide additional data width for wider address/data paths or buses carrying parity. The \\x92FCT841T devices are buffered 10-bit-wide versions of the FCT373 function. The \\x • Function, Pinout, and Drive Compatible With FCT, F, and AM29841 Logic\n• Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics\n• Matched Rise and Fall Times\n• 2000-V Human-Body Model (A114-A)\n• 1000-V Charged-Device Model (C101)\n• Fully Compatible With TTL Input and Outp;

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