CDC328ADG4

Marking：CDC328A；Package：SOIC；1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY

LowOutputSkewforClock-Distribution andClock-GenerationApplications TTL-CompatibleInputsandOutputs DistributesOneClockInputtoSixClock Outputs PolarityControlSelectsTrueor ComplementaryOutputs DistributedVCCandGNDPinsReduce SwitchingNoise High-DriveOutputs(−48-mA

CDC328ADR

Marking：CDC328A；Package：SOIC；1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY

LowOutputSkewforClock-Distribution andClock-GenerationApplications TTL-CompatibleInputsandOutputs DistributesOneClockInputtoSixClock Outputs PolarityControlSelectsTrueor ComplementaryOutputs DistributedVCCandGNDPinsReduce SwitchingNoise High-DriveOutputs(−48-mA

CDC328ADR.B

Marking：CDC328A；Package：SOIC；1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY

LowOutputSkewforClock-Distribution andClock-GenerationApplications TTL-CompatibleInputsandOutputs DistributesOneClockInputtoSixClock Outputs PolarityControlSelectsTrueor ComplementaryOutputs DistributedVCCandGNDPinsReduce SwitchingNoise High-DriveOutputs(−48-mA

CDC328ADRG4.B

Marking：CDC328A；Package：SOIC；1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY

LowOutputSkewforClock-Distribution andClock-GenerationApplications TTL-CompatibleInputsandOutputs DistributesOneClockInputtoSixClock Outputs PolarityControlSelectsTrueor ComplementaryOutputs DistributedVCCandGNDPinsReduce SwitchingNoise High-DriveOutputs(−48-mA

CDC337DW

Marking：CDC337；Package：SOIC；CLOCK DRIVER WITH 3-STATE OUTPUTS

LowOutputSkew,LowPulseSkewfor Clock-DistributionandClock-Generation Applications TTL-CompatibleInputsand CMOS-CompatibleOutputs DistributesOneClockInputtoEight Outputs –FourSame-FrequencyOutputs –FourHalf-FrequencyOutputs DistributedVCCandGroundPinsReduce Switc

CDC337DW.B

Marking：CDC337；Package：SOIC；CLOCK DRIVER WITH 3-STATE OUTPUTS

LowOutputSkew,LowPulseSkewfor Clock-DistributionandClock-Generation Applications TTL-CompatibleInputsand CMOS-CompatibleOutputs DistributesOneClockInputtoEight Outputs –FourSame-FrequencyOutputs –FourHalf-FrequencyOutputs DistributedVCCandGroundPinsReduce Switc

CDC337DWG4.B

Marking：CDC337；Package：SOIC；CLOCK DRIVER WITH 3-STATE OUTPUTS

LowOutputSkew,LowPulseSkewfor Clock-DistributionandClock-Generation Applications TTL-CompatibleInputsand CMOS-CompatibleOutputs DistributesOneClockInputtoEight Outputs –FourSame-FrequencyOutputs –FourHalf-FrequencyOutputs DistributedVCCandGroundPinsReduce Switc

CDC340DW

Marking：CDC340；Package：SOIC；1-LINE TO 8-LINE CLOCK DRIVER

LowOutputSkew,LowPulseSkewfor Clock-DistributionandClock-Generation Applications TTL-CompatibleInputsandOutputs DistributesOneClockInputtoEight Outputs DistributedVCCandGroundPinsReduce SwitchingNoise High-DriveOutputs(–48-mAIOH, 48-mAIOL) State-of-the-ArtEPIC-

CDC340DW.B

Marking：CDC340；Package：SOIC；1-LINE TO 8-LINE CLOCK DRIVER

LowOutputSkew,LowPulseSkewfor Clock-DistributionandClock-Generation Applications TTL-CompatibleInputsandOutputs DistributesOneClockInputtoEight Outputs DistributedVCCandGroundPinsReduce SwitchingNoise High-DriveOutputs(–48-mAIOH, 48-mAIOL) State-of-the-ArtEPIC-

CDC341DW

Marking：CDC341；Package：SOIC；1-LINE TO 8-LINE CLOCK DRIVER

LowOutputSkew,LowPulseSkewfor Clock-DistributionandClock-Generation Applications TTL-CompatibleInputsandOutputs DistributesOneClockInputtoEight Outputs DistributedVCCandGroundPinsReduce SwitchingNoise High-DriveOutputs(–48-mAIOH, 48-mAIOL) State-of-the-ArtEPIC-