TRIPLE 3-INPUT POSITIVE-NAND GATES

Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883,

文件：462.81 Kbytes 页数：13 Pages

TI

德州仪器

Triple 3-Input NAND Gate

文件：29.45 Kbytes 页数：5 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-NAND GATES

文件：806.69 Kbytes 页数：12 Pages

TI

德州仪器

丝印：CD74ACT109E；Package：PDIP；DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883,

文件：412.14 Kbytes 页数：14 Pages

TI

德州仪器

丝印：CD74ACT109E；Package：PDIP；DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883,

文件：412.14 Kbytes 页数：14 Pages

TI

德州仪器

丝印：CD74ACT10E；Package：PDIP；TRIPLE 3-INPUT POSITIVE-NAND GATES

Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883,

文件：462.81 Kbytes 页数：13 Pages

TI

德州仪器

丝印：CD74ACT10E；Package：PDIP；TRIPLE 3-INPUT POSITIVE-NAND GATES

Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883,

文件：462.81 Kbytes 页数：13 Pages

TI

德州仪器

具有 TTL 兼容型 CMOS 输入的 3 通道、3 输入、4.5V 至 5.5V 与非门

The CD74ACT10 contains three independent 3-input NAND gates. The device performs the Boolean functions Y = (A • B • C)\\ or Y = A\\ + B\\ + C\\ in positive logic. • Inputs Are TTL-Voltage Compatible\n• Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption\n• Balanced Propagation Delays\n• ±24-mA Output Drive Current \n• Fanout to 15 F Devices\n \n• SCR Latchup-Resistant CMOS Process and Circuit Design\n• Exceeds 2-kV ESD Protection Per M;

TI

德州仪器

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883,

文件：412.14 Kbytes 页数：14 Pages

TI

德州仪器

丝印：ACT109M；Package：SOIC；DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883,

文件：412.14 Kbytes 页数：14 Pages

TI

德州仪器