ECL/PECL D Flip-Flop with Set and Reset

[Arizona-Microtek] DESCRIPTION The AZ10/100EL31 is a master-slave D flip-flop with set and reset. The device is functionally equivalent to the E131 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E131, the EL31 is ide

文件：140.5 Kbytes 页数：6 Pages

ETCList of Unclassifed Manufacturers

未分类制造商

ECL/PECL D Flip-Flop with Set and Reset

[Arizona-Microtek] DESCRIPTION The AZ10/100EL31 is a master-slave D flip-flop with set and reset. The device is functionally equivalent to the E131 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E131, the EL31 is ide

文件：140.5 Kbytes 页数：6 Pages

ETCList of Unclassifed Manufacturers

未分类制造商

ECL/PECL D Flip-Flop with Set and Reset

DESCRIPTION The AZ10/100EL31 is a master-slave D flip-flop with set and reset. The device is functionally equivalent to the E131 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E131, the EL31 is ideally suited for thos

文件：77.74 Kbytes 页数：6 Pages

AZM

ECL/PECL D Flip-Flop with Set and Reset

[Arizona-Microtek] DESCRIPTION The AZ10/100EL31 is a master-slave D flip-flop with set and reset. The device is functionally equivalent to the E131 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E131, the EL31 is ide

文件：140.5 Kbytes 页数：6 Pages

ETCList of Unclassifed Manufacturers

未分类制造商

ECL/PECL D Flip-Flop with Set and Reset

[Arizona-Microtek] DESCRIPTION The AZ10/100EL31 is a master-slave D flip-flop with set and reset. The device is functionally equivalent to the E131 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E131, the EL31 is ide

文件：140.5 Kbytes 页数：6 Pages

ETCList of Unclassifed Manufacturers

未分类制造商

ECL/PECL 첨 2 Divider

DESCRIPTION The AZ10/100EL32 is an integrated ÷2 divider. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random logic state; the reset allows for the synchronization of multiple EL32’s in a system. The EL32 provides a VBB

文件：104.21 Kbytes 页数：6 Pages

ETCList of Unclassifed Manufacturers

未分类制造商

ECL/PECL 첨 2 Divider

DESCRIPTION The AZ10/100EL32 is an integrated ÷2 divider. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random logic state; the reset allows for the synchronization of multiple EL32’s in a system. The EL32 provides a VBB

文件：104.2 Kbytes 页数：6 Pages

AZM

ECL/PECL 첨 2 Divider

DESCRIPTION The AZ10/100EL32 is an integrated ÷2 divider. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random logic state; the reset allows for the synchronization of multiple EL32’s in a system. The EL32 provides a VBB

文件：104.2 Kbytes 页数：6 Pages

AZM

ECL/PECL 첨 2 Divider

DESCRIPTION The AZ10/100EL32 is an integrated ÷2 divider. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random logic state; the reset allows for the synchronization of multiple EL32’s in a system. The EL32 provides a VBB

文件：104.21 Kbytes 页数：6 Pages

ETCList of Unclassifed Manufacturers

未分类制造商

ECL/PECL 첨 2 Divider

DESCRIPTION The AZ10/100EL32 is an integrated ÷2 divider. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random logic state; the reset allows for the synchronization of multiple EL32’s in a system. The EL32 provides a VBB

文件：104.21 Kbytes 页数：6 Pages

ETCList of Unclassifed Manufacturers

未分类制造商