ECL/PECL Oscillator Gain Stage and Buffer with Enable

[Arizona-Microtek] DESCRIPTION The AZ10/100EL16VO is an oscillator gain stage with a high gain output buffer including an enable. The QHG/Q¯ HG outputs have a voltage gain several times greater than the Q/Q¯ outputs. An enable input (EN ¯¯ ) allows continuous oscillator operation. When EN ¯¯ is

文件：258.68 Kbytes 页数：18 Pages

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ECL/PECL Oscillator Gain Stage and Buffer with Enable

[Arizona-Microtek] DESCRIPTION The AZ10/100EL16VO is an oscillator gain stage with a high gain output buffer including an enable. The QHG/Q¯ HG outputs have a voltage gain several times greater than the Q/Q¯ outputs. An enable input (EN ¯¯ ) allows continuous oscillator operation. When EN ¯¯ is

文件：258.68 Kbytes 页数：18 Pages

ETCList of Unclassifed Manufacturers

未分类制造商

ECL/PECL Oscillator Gain Stage and Buffer with Enable

[Arizona-Microtek] DESCRIPTION The AZ10/100EL16VO is an oscillator gain stage with a high gain output buffer including an enable. The QHG/Q¯ HG outputs have a voltage gain several times greater than the Q/Q¯ outputs. An enable input (EN ¯¯ ) allows continuous oscillator operation. When EN ¯¯ is

文件：258.68 Kbytes 页数：18 Pages

ETCList of Unclassifed Manufacturers

未分类制造商

ECL/PECL Oscillator Gain Stage and Buffer with Enable

[Arizona-Microtek] DESCRIPTION The AZ10/100EL16VO is an oscillator gain stage with a high gain output buffer including an enable. The QHG/Q¯ HG outputs have a voltage gain several times greater than the Q/Q¯ outputs. An enable input (EN ¯¯ ) allows continuous oscillator operation. When EN ¯¯ is

文件：258.68 Kbytes 页数：18 Pages

ETCList of Unclassifed Manufacturers

未分类制造商

CMOS/TTL to Differential PECL Translator

DESCRIPTION The AZ10/100ELT20 is a CMOS/TTL to differential PECL translator. It operates with a single power supply of +3.0 to +5.5 volts, making it ideal for both LVCMOS/LVTTL and CMOS/TTL applications. The extremely small MLP 8 2x2 mm package makes it ideal for those applications where space, p

文件：113.64 Kbytes 页数：10 Pages

AZM

CMOS/TTL to Differential PECL Translator

DESCRIPTION The AZ10/100ELT20 is a CMOS/TTL to differential PECL translator. It operates with a single power supply of +3.0 to +5.5 volts, making it ideal for both LVCMOS/LVTTL and CMOS/TTL applications. The extremely small MLP 8 2x2 mm package makes it ideal for those applications where space, p

文件：113.64 Kbytes 页数：10 Pages

AZM

CMOS/TTL to Differential PECL Translator

DESCRIPTION The AZ10/100ELT20 is a CMOS/TTL to differential PECL translator. It operates with a single power supply of +3.0 to +5.5 volts, making it ideal for both LVCMOS/LVTTL and CMOS/TTL applications. The extremely small MLP 8 2x2 mm package makes it ideal for those applications where space, p

文件：113.64 Kbytes 页数：10 Pages

AZM

ECL/PECL Differential Receiver with Variable Output Swing

DESCRIPTION The AZ10/100EP16VS is a Silicon–Germanium (SiGe) differential receiver with variable output swing. The EP16VS has functionality and output transition times similar to the EP16, with an input that controls the amplitude of the Q/Q¯ outputs. FEATURES • Silicon-Germanium for High Speed

文件：122.42 Kbytes 页数：10 Pages

AZM

ECL/PECL Differential Receiver with Variable Output Swing

DESCRIPTION The AZ10/100EP16VS is a Silicon–Germanium (SiGe) differential receiver with variable output swing. The EP16VS has functionality and output transition times similar to the EP16, with an input that controls the amplitude of the Q/Q¯ outputs. FEATURES • Silicon-Germanium for High Speed

文件：122.42 Kbytes 页数：10 Pages

AZM

ECL/PECL 첨4 Divider

DESCRIPTION The AZ10/100LVEL33 is an integrated ÷4 divider. The RESET pin is asynchronous and clears the output (Q Low, Q¯ High) on the rising edge. Upon power-up, the internal flip-flop will be in a random logic state. RESET allows for the synchronization of multiple LVEL33’s in a system. FEATU

文件：127.85 Kbytes 页数：10 Pages

AZM