ANX7496

8.1G DisplayPort™ 4-lanes Re-timer

Features Built-inre-timers -Integratedre-timers(Linktraining-tunablePHYrepeater)forDisplayPortuptoHBR3@8.1Gbps -Supportsbothtransparentmodeandnontransparentmode(transparentorLTTPR) -Losscompensationtorecoverupto27dBchannelloss IntegratedAUXpass-through

ANX7496

10G USB 3.1 Re-timer (1-Port)

Features
Built-inre-timer -Integratedre-timerforUSB3.11-port(Tx/Rx)upto10Gbps -Losscompensationtorecoverupto23dBchannelloss
Protocolawarenessforbetterlinkpowermanagement(LPM)andsavings
Referenceclockforre-timer -Utilizesa24MHzreferenceXTALor1.05V

ANX7496

10G Active Mux (1x2) with Integrated Re-timer for USB 3.1

Features
Built-inre-timer -Integratedre-timerforUSB3.1uptoGen2@10Gbps -Losscompensationtorecoverupto23dBchannelloss
Integratedmux -Digital(1x2)muxswitchesUSBsignalsandpreservesenhancedsignaloutputoverUSB-Cconnector -MuxcontrolinputthroughI2Ccomma

ANX7497

8.1G (up to HBR3) DisplayPort™ 4-lane Re-timer

Features Built-inre-timers −Integratedre-timers(Linktraining-tunablePHYrepeater)forDisplayPortuptoHBR3@8.1Gbps.Supportsbothtransparentmodeandnon-transparentmode(transparentorLTTPR) −Losscompensationtorecoverupto27dB IntegratedAUXpass-through −IntegratedA

ANX7497

6G Active Re-driver with Linear Equalization for HDMI 2.0

Features •Built-inRe-driverwithCTLE −IntegratedRe-driverforHDMI2.0upto6Gbps −SupportsDP++,HDMISourceapplications −Losscompensationtorecoverupto-10dBchannelloss@6Gbps •CTLE,FlatGainandSwingconfigurations −Four-laneconfigurationssetbypinstrapping. −Indep

ANX7497

10G Active Mux (1x2) with Integrated Re-timer for USB 3.2

Features *Built-inre-timer ㅡIntegratedre-timerforUSB3.2uptoGen2@10Gbps —SupportsbothSeparateReferenceClockIndependentSSC(SRIS)andBit-LevelRe-timer(BLR)ArchitecturesofUSB3.2Specification(Appendix-E) —Supportsbothhost(source)anddevice(sink)applicationsinUS

ANX7497

20G Active Retimer for USB 3.2

Features Built-inre-timer -Integratedre-timerforUSB3.2withtwolanesuptoGen2@10Gbpseachforacombined20Gthroughput -SupportsbothSeparateReferenceClockIndependentSSC(SRIS)andBit-LevelRe-timer(BLR)ArchitecturesofUSB3.2Specification -Supportsbothhost(source)

ANX7497

10G Active Mux (1x2) with Integrated Re-timer and CC Detection for USB 3.2

Features Built-inre-timer −Integratedre-timerforUSB3.2uptoGen2@10Gbps −SupportsbothSeparateReferenceClockIndependentSSC(SRIS)andBit-LevelRe-timer(BLR)ArchitecturesofUSB3.2Specification(Appendix-E) −Losscompensationtorecoverupto23dBchannelloss Integrat

ANX7497

20G Active Mux (2x2) with Integrated Re-timer and CC Detection for USB 3.2

Features Built-inre-timer −Integratedre-timerforUSB3.2uptoGen2@2x10Gbpsforacombined20Gdatathroughput −SupportsbothSeparateReferenceClockIndependentSSC(SRIS)andBit-LevelRe-timer(BLR)ArchitecturesofUSB3.2Specification(Appendix-E) −Supportsbothhost(source

ANX7497

106 Active Mux (6x4) with Integrated Re-timers for USB3.2/DisplayPort1.4

Features *Built-inre-timers —Integratedre-timersforUSB3.2uptoGen2@10Gbps —SupportsbothSeparateReferenceClockIndependentSSC(SRIS)andBit-LevelRe-timer(BLR)ArchitecturesofUSB3.2Specification(Appendix-E) —Integratedre-timers(Linktraining-tunablePHYrepeater)forD