Single Phase 0.5AMP Surface Mount Glass Passivated Bridge Rectifiers

文件：574.49 Kbytes 页数：4 Pages

CITC

竹懋科技

包装：盒 类别：开关 可配置开关元件 - 主体 描述：SWITCH UNITPB BOOTED 30 MM NON I

ALTECH

丝印：AB823；Package：SSOP；9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc

文件：385.69 Kbytes 页数：16 Pages

TI

德州仪器

丝印：AB823；Package：SSOP；9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc

文件：385.69 Kbytes 页数：16 Pages

TI

德州仪器

丝印：AB823；Package：SSOP；9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc

文件：385.69 Kbytes 页数：16 Pages

TI

德州仪器

丝印：AB827；Package：SSOP；10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件：519.58 Kbytes 页数：19 Pages

TI

德州仪器

丝印：AB827；Package：SSOP；10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件：519.58 Kbytes 页数：19 Pages

TI

德州仪器

丝印：AB827；Package：TSSOP；10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件：519.58 Kbytes 页数：19 Pages

TI

德州仪器

丝印：AB827；Package：TSSOP；10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件：519.58 Kbytes 页数：19 Pages

TI

德州仪器

丝印：AB827；Package：TSSOP；10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件：519.58 Kbytes 页数：19 Pages

TI

德州仪器