9DBL0941数据手册Renesas中文资料规格书

描述 Description

The 9DBL0941 device is a member of IDT's 3.3V full-featured PCIe clock family. The 9DBL0941 device supports PCIe Gen1-4 Common Clocked (CC) and PCIe Separate Reference Independent Spread (SRIS) systems. The device's integrated output terminations provide a direct connection to 100Ω transmission lines. The 9DBL09P1 can be factory programmed with a user-defined power up default SMBus configuration.

For information regarding evaluation boards and material, please contact your local IDT sales representative.

特性 Features

• PCIe Gen1–4 CC compliant
• Supports PCIe Gen2–3 SRIS compliant
• Supports PCIe SRnS compatible
• Direct connection to 100Ω transmission lines; saves 36 resistors compared to standard PCIe devices
• Spread spectrum tolerant; allows reduction of EMI
• Pin/SMBus selectable PLL bandwidth and PLL Bypass; minimize phase jitter for each application
• Easy AC-coupling to other logic families; see IDT application note AN-891.
• Space saving 6 x 6 mm 48-VFQFPN; minimal board space