9DB803数据手册集成电路（IC）的应用特定时钟/定时规格书PDF

描述 Description

The 9DB803 is compatible with the Intel DB800v2 Differential Buffer Specification. This buffer provides 8 PCI Express Gen2 clocks. The 9DB803 is driven by a differential output pair from a CK410B+, CK505 or CK509B main clock generator.

特性 Features

8 - 0.7 V current-mode differential output pairs
Supports zero delay buffer mode and fanout mode
Bandwidth programming available
50-100 MHz operation in PLL mode
50-400 MHz operation in Bypass mode
Spread spectrum modulation tolerant, 0 to -0.5% down spread and +/- 0.25% center spread.
Supports undriven differential outputs in PD# and SRC_STOP# modes for power management.
Outputs cycle-cycle jitter < 50 ps
Outputs skew: 50 ps
Phase jitter: PCIe Gen1 < 86 ps peak to peak
Phase jitter: PCIe Gen2 < 3.0/3.1 ps rms
48-pin SSOP/TSSOP package
RoHS compliant packaging