丝印：87335D；Package：LSON-CLIP；CSD87335Q3D Synchronous Buck NexFET™ Power Block

1 Features 1• Half-Bridge Power Block • Up to 27-V VIN • 93.5% System Efficiency at 15 A • Up to 25-A Operation • High-Frequency Operation (Up to 1.5 MHz) • High-Density SON 3.3-mm × 3.3-mm Footprint • Optimized for 5-V Gate Drive • Low-Switching Losses • Ultra-Low Inductance Package

文件：789.71 Kbytes 页数：25 Pages

TI

德州仪器

丝印：8733A；Package：TQFN；2W Class-K Audio Amplifier with RF-TDD Suppression and NCN

文件：878.15 Kbytes 页数：18 Pages

AWINIC

艾为电子

÷2,Differential-to-2.5V/3.3V ECL/LVPECL Clock Generator

The 87332I-01 is a high performance ÷2 Differential- to-2.5V/3.3V ECL/LVPECL Clock Generator. The CLK, nCLK pair can accept most standard differential input levels The 87332I-01 is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and part-to-part skew characteris ·One ÷2 differential 2.5V/3.3V LVPECL / ECL output\n·One CLK, nCLK input pair\n·CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL\n·Maximum output frequency: 500MHz\n·Maximum input frequency: 1GHz\n·Translates any single ended input signal to 3.3V LV;

Renesas

瑞萨

Low Skew,÷2/4,÷4/5/6,Differential-to-3.3V LVPECL Clock Generator

The 87339I-11 is a low skew, high performance Differential-to-3.3V LVPECL Clock Generator/Divider. The 87339I-11 has one differential clock input pair. The CLK, nCLK pair can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt pulses on the o ·Dual ÷2, ÷4 differential 3.3V LVPECL outputs\n·Dual ÷4, ÷5, ÷6 differential 3.3V LVPECL outputs\n·One differential CLK, nCLK input pair\n·CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL\n·Maximum clock input frequency: 1GHz\n·Translates any single;

Renesas

瑞萨

包装：散装 类别：标签，标志，护栏，标识 标签 描述：TAG BRASS RND 1.5 DHWR 476-500

Brady Corporation

包装：散装 类别：标签，标志，护栏，标识 标签 描述：TAG BRASS RND 1.5 DHWR 476-500

Brady Corporation