丝印：ICS3947AYIN；Package：LQFP；Low Skew, 1-to-9 LVCMOS Fanout Buffer

FEATURES • 9 LVCMOS/LVTTL outputs • Selectable CLK0 and CLK1 can accept the following input levels: LVCMOS and LVTTL • Maximum output frequency: 110MHz • Output skew: 500ps (maximum) • Part-to-part skew: 2ns (maximum) • 3.3V operating supply • -40°C to 85°C ambient operating temperature •

文件：210.02 Kbytes 页数：11 Pages

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Low Skew, 1-to-9 LVCMOS Fanout Buffer

FEATURES • 9 LVCMOS/LVTTL outputs • Selectable CLK0 and CLK1 can accept the following input levels: LVCMOS and LVTTL • Maximum output frequency: 110MHz • Output skew: 500ps (maximum) • Part-to-part skew: 2ns (maximum) • 3.3V operating supply • -40°C to 85°C ambient operating temperature •

文件：210.02 Kbytes 页数：11 Pages

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Low Skew, 1-to-9 LVCMOS/LVTTL Fanout Buffer

GENERAL DESCRIPTION The 83947I-147 is a low skew, 1-to-9 LVCMOS/LVTTL Fanout Buffer. The low impedance LVCMOS/LVTTL outputs are designed to drive 50 series or parallel terminated transmission lines. The effective fanout can be increased from 9 to 18 by utilizing the ability of the outputs to

文件：398.96 Kbytes 页数：13 Pages

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丝印：ICS3948AI01L；Package：LQFP；Low Skew, 1-to-12 Differential-to- LVCMOS Fanout Buffer

FEATURES • Twelve LVCMOS outputs • Selectable LVCMOS clock or differential CLK, nCLK inputs • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL • Maximum output frequency: 150M

文件：144.47 Kbytes 页数：13 Pages

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丝印：ICS3948AI01L；Package：LQFP；Low Skew, 1-to-12 Differential-to- LVCMOS Fanout Buffer

FEATURES • Twelve LVCMOS outputs • Selectable LVCMOS clock or differential CLK, nCLK inputs • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL • Maximum output frequency: 150M

文件：144.47 Kbytes 页数：13 Pages

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丝印：ICS948AI147L；Package：LQFP；Low Skew, 1-to-1 Differentialto- LVCMOS/ LVTTL Fanout Buffer

Features • Twelve LVCMOS/LVTTL outputs • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Output frequency: 350MH

文件：557.19 Kbytes 页数：18 Pages

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丝印：ICS948AI147L；Package：LQFP；Low Skew, 1-to-1 Differentialto- LVCMOS/ LVTTL Fanout Buffer

Features • Twelve LVCMOS/LVTTL outputs • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Output frequency: 350MH

文件：557.19 Kbytes 页数：18 Pages

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丝印：ICS83948AYIL；Package：LQFP；Low Skew, 1-to-12 Differential-to- LVCMOS/LVTTL Fanout Buffer

Features • Twelve LVCMOS/LVTTL outputs • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Maximum output frequen

文件：504.1 Kbytes 页数：14 Pages

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丝印：ICS83948AYI；Package：LQFP；Low Skew, 1-to-12 Differential-to- LVCMOS/LVTTL Fanout Buffer

Features • Twelve LVCMOS/LVTTL outputs • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Maximum output frequen

文件：504.1 Kbytes 页数：14 Pages

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Low Skew, 1-to-12 Differential-to- LVCMOS/LVTTL Fanout Buffer

Features • Twelve LVCMOS/LVTTL outputs • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Maximum output frequen

文件：504.1 Kbytes 页数：14 Pages

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