3.3V Octal D-type transparent latch 3-State

DESCRIPTION The LVT573 is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device is an octal transparent latch coupled to eight 3-State output buffers. The two sections of the device are controlled independently by Enable (E) and Output Enable (OE) control gates. The 74

文件：99.99 Kbytes 页数：12 Pages

PHI

PHI

3.3 V octal D-type transparent latch; (3-state)

General description The 74LVT573 is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device is an octal transparent latch coupled to eight 3-state output buffers. The two sections of the device are controlled independently by Latch Enable (LE) and Output Enable (OE) con

文件：111.07 Kbytes 页数：16 Pages

恩XP

3.3 V octal D-type transparent latch; 3-state

1. General description The 74LVT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change ea

文件：264.61 Kbytes 页数：15 Pages

NEXPERIA

安世

3.3V Octal D-type transparent latch 3-State

DESCRIPTION The LVT573 is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device is an octal transparent latch coupled to eight 3-State output buffers. The two sections of the device are controlled independently by Enable (E) and Output Enable (OE) control gates. The 74

文件：99.99 Kbytes 页数：12 Pages

PHI

PHI

3.3 V octal D-type transparent latch; 3-state

The 74LVT573 is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device is an octal transparent latch coupled to eight 3-state output buffers. The two sections of the device are controlled independently by Latch Enable (LE) and Output Enable (OE) control gates. The 74LVT57 • Inputs and outputs arranged for easy interfacing to microprocessors\n• 3-state outputs for bus interfacing\n• Common output enable control\n• TTL input and output switching levels\n• Input and output interface capability to systems at 5 V supply\n• Bus hold data inputs eliminate need for external ;

Nexperia

安世

Package：20-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 锁存器 描述：IC OCTAL D TRANSP LATCH 20TSSOP

Nexperia USA Inc.

Package：20-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 锁存器 描述：IC OCTAL D TRANSP LATCH 20TSSOP

Nexperia USA Inc.