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74LVCH16374A

16-bit edge triggered D-type flip-flop with 5 Volt tolerant inputs/outputs 3-State

DESCRIPTION The 74LVC(H)16374A is a 16-bit edge-triggered flip-flop featuringseparate D-type inputs for each flip-flop and 3-State outputs for bus oriented applications. The 74LVC16374A consists of 2 sections of eight positive edge-triggered flip-flops. A clock (CP) input and an output enable (OE

文件:82.1 Kbytes 页数:10 Pages

PHI

PHI

PHI

74LVCH16374A

16-bit edge-triggered D-type flip-flop with 5 V tolerant inputs/outputs; 3-state

General description The 74LVC16374A and 74LVCH16374A are 16-bit edge-triggered flip-flops featuring separate D-type inputs with bus hold (74LVCH16374A only) for each flip-flop and 3-state outputs for bus oriented applications. It consists of two sections of eight positive edge-triggered flip-flop

文件:175.05 Kbytes 页数:19 Pages

恩XP

恩XP

74LVCH16374A

16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state

1. General description The 74LVC16374A; 74LVCH16374A is a 16-bit edge-triggered D-type flip-flop with 3-state outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. The device features two clocks (1CP and 2CP) and two output enables (1OE and 2OE), each controlling 8-bi

文件:242.17 Kbytes 页数:13 Pages

NEXPERIA

安世

74LVCH16374ABQ

16-bit edge-triggered D-type flip-flop with 5 V tolerant inputs/outputs; 3-state

General description The 74LVC16374A and 74LVCH16374A are 16-bit edge-triggered flip-flops featuring separate D-type inputs with bus hold (74LVCH16374A only) for each flip-flop and 3-state outputs for bus oriented applications. It consists of two sections of eight positive edge-triggered flip-flop

文件:175.05 Kbytes 页数:19 Pages

恩XP

恩XP

74LVCH16374ADGG

16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state

1. General description The 74LVC16374A; 74LVCH16374A is a 16-bit edge-triggered D-type flip-flop with 3-state outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. The device features two clocks (1CP and 2CP) and two output enables (1OE and 2OE), each controlling 8-bi

文件:242.17 Kbytes 页数:13 Pages

NEXPERIA

安世

74LVCH16374ADGG

16-bit edge-triggered D-type flip-flop with 5 V tolerant inputs/outputs; 3-state

General description The 74LVC16374A and 74LVCH16374A are 16-bit edge-triggered flip-flops featuring separate D-type inputs with bus hold (74LVCH16374A only) for each flip-flop and 3-state outputs for bus oriented applications. It consists of two sections of eight positive edge-triggered flip-flop

文件:175.05 Kbytes 页数:19 Pages

恩XP

恩XP

74LVCH16374ADGG

16-bit edge triggered D-type flip-flop with 5 Volt tolerant inputs/outputs 3-State

DESCRIPTION The 74LVC(H)16374A is a 16-bit edge-triggered flip-flop featuringseparate D-type inputs for each flip-flop and 3-State outputs for bus oriented applications. The 74LVC16374A consists of 2 sections of eight positive edge-triggered flip-flops. A clock (CP) input and an output enable (OE

文件:82.1 Kbytes 页数:10 Pages

PHI

PHI

PHI

74LVCH16374ADGGG4

丝印:LVCH16374A;Package:TSSOP;SN74LVCH16374A 16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs

1 Features 1• Member of the Texas Instruments Widebus™ Family • Operates From 1.65 V to 3.6 V • Inputs Accept Voltages to 5.5 V • Max tpd of 4.5 ns at 3.3 V • Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V,

文件:542.3 Kbytes 页数:26 Pages

TI

德州仪器

74LVCH16374ADGG-Q100

16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state

General description The 74LVC16374A-Q100 and 74LVCH16374A-Q100 are 16-bit edge-triggered flip-flops featuring separate D-type inputs with bus hold (74LVCH16374A-Q100 only) for each flip-flop and 3-state outputs for bus-oriented applications. It consists of two sections of eight positive edge-trig

文件:230.64 Kbytes 页数:14 Pages

NEXPERIA

安世

74LVCH16374ADGGRG4

丝印:LVCH16374A;Package:TSSOP;SN74LVCH16374A 16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs

1 Features 1• Member of the Texas Instruments Widebus™ Family • Operates From 1.65 V to 3.6 V • Inputs Accept Voltages to 5.5 V • Max tpd of 4.5 ns at 3.3 V • Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V,

文件:542.3 Kbytes 页数:26 Pages

TI

德州仪器

技术参数

  • VCC (V):

    1.2 - 3.6

  • Logic switching levels:

    CMOS/LVTTL

  • Output drive capability (mA):

    ± 24

  • tpd (ns):

    3.8

  • fmax (MHz):

    150

  • Power dissipation considerations:

    low

  • Tamb (°C):

    -40~125

  • Rth(j-a) (K/W):

    82

  • Ψth(j-top) (K/W):

    2.0

  • Rth(j-c) (K/W):

    37

  • Package name:

    TSSOP48

供应商型号品牌批号封装库存备注价格
24+
5000
公司存货
询价
PHI
25+
TSOP48
1790
⊙⊙新加坡大量现货库存,深圳常备现货!欢迎查询!⊙
询价
PHI
00+
TSOP48
770
全新原装100真实现货供应
询价
PHI
24+
TSOP48
21322
公司原厂原装现货假一罚十!特价出售!强势库存!
询价
PHI
24+
TSSOP
3500
原装现货,可开13%税票
询价
PHI
25+
TSOP48
2987
只售原装自家现货!诚信经营!欢迎来电!
询价
PHI
24+
TSOP48
6540
原装现货/欢迎来电咨询
询价
TI
2023+环保现货
TSSOP
4425
专注军工、汽车、医疗、工业等方案配套一站式服务
询价
TI
24+
TSSOP-48
26200
原装现货,诚信经营!
询价
PHI
24+
TSSOP
7850
只做原装正品现货或订货假一赔十!
询价
更多74LVCH16374A供应商 更新时间2026-1-28 16:00:00